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[209.132.180.131]) by mx.google.com with ESMTPS id n28si3599920pgd.148.2017.01.10.15.06.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 10 Jan 2017 15:06:32 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-445813-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-445813-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-445813-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=jkeIuDt1cCsmadaB/JcrEggoudi+4RfLSi6sLEraEhPnzm63pFBI2 4LY40nsXQXDv6BOCLQg+Pw/A4hFJTNEhjtN0JFSQsuQp2EkI5qeK6ldwzoa/ZFw8 slpDEkcsu2rWED5xAhi7+G+sFYRsM0HIgd6oWcGJdYcy4O9hoTn94I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=aMuwBSXWyGJouZC+i2bFZqZvWDc=; b=cRMDTWa3EM64g0VQukRk/2xSZiPU uI5nTdu1A+lBjb9C8BqwQYy/QtMEAT+GXVen5wyRcLz/cfhLq5vtrVNFhRDhguMu faTneSd9UvdMnUp/21e/jbb9AG+VbIiokLO5T935i9vdI/9LEfRTGyVBnsnO7J0k 8+ju44DhJF3pE4k= Received: (qmail 23593 invoked by alias); 10 Jan 2017 23:06:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 23574 invoked by uid 89); 10 Jan 2017 23:06:18 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=noncontiguous, non-contiguous, RECORD_TYPE, record_type X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 10 Jan 2017 23:06:16 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id D61FF831DC; Wed, 11 Jan 2017 00:06:13 +0100 (CET) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DvKsUmhyZM0u; Wed, 11 Jan 2017 00:06:13 +0100 (CET) Received: from polaris.localnet (bon31-6-88-161-99-133.fbx.proxad.net [88.161.99.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id 8E6F68143F; Wed, 11 Jan 2017 00:06:13 +0100 (CET) From: Eric Botcazou To: Christophe Lyon Cc: gcc-patches@gcc.gnu.org, Richard Biener Subject: Re: [patch] Fix wrong code for return of small aggregates on big-endian Date: Wed, 11 Jan 2017 00:05:41 +0100 Message-ID: <1794175.O1SLF1HnGB@polaris> User-Agent: KMail/4.14.10 (Linux/3.16.7-53-desktop; KDE/4.14.9; x86_64; ; ) In-Reply-To: References: <22150809.kPoQm0lI1j@polaris> MIME-Version: 1.0 > I have noticed new failures after this commit (r244249). > g++.dg/opt/call3.C fails at execution on armeb targets > g++.dg/opt/call2.C fails at execution on aarch64_be It turns out that there is already a big-endian adjustment a few lines above: /* If the value has a record type and an integral mode then, if BITSIZE is narrower than this mode and this is for big-endian data, we must first put the value into the low-order bits. Moreover, the field may be not aligned on a byte boundary; in this case, if it has reverse storage order, it needs to be accessed as a scalar field with reverse storage order and we must first put the value into target order. */ if (TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT) { HOST_WIDE_INT size = GET_MODE_BITSIZE (GET_MODE (temp)); reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp)); if (reverse) temp = flip_storage_order (GET_MODE (temp), temp); if (bitsize < size && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp, size - bitsize, NULL_RTX, 1); } and adding the extraction leads to a double adjustment on armeb, whereas no adjustment is still applied to aarch64_be... That's why the attached patch merges the second adjustment in the first one by moving up the code fetching the return value from the registers; this ensures that only one adjustment is ever applied and that it is applied only on left- justified values. But a final extraction (without big-endian adjustment) is still needed for small BLKmode values, otherwise store_bit_field aborts... Tested on the same platforms as the original patch, applied as obvious. * expr.c (store_field): In the bitfield case, fetch the return value from the registers before applying a single big-endian adjustment. Always do a final load for a BLKmode value not larger than a word. -- Eric Botcazou Index: expr.c =================================================================== --- expr.c (revision 244258) +++ expr.c (working copy) @@ -6832,13 +6832,36 @@ store_field (rtx target, HOST_WIDE_INT b temp = expand_normal (exp); - /* If the value has a record type and an integral mode then, if BITSIZE - is narrower than this mode and this is for big-endian data, we must - first put the value into the low-order bits. Moreover, the field may - be not aligned on a byte boundary; in this case, if it has reverse - storage order, it needs to be accessed as a scalar field with reverse - storage order and we must first put the value into target order. */ - if (TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE + /* Handle calls that return values in multiple non-contiguous locations. + The Irix 6 ABI has examples of this. */ + if (GET_CODE (temp) == PARALLEL) + { + HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); + machine_mode temp_mode + = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT); + rtx temp_target = gen_reg_rtx (temp_mode); + emit_group_store (temp_target, temp, TREE_TYPE (exp), size); + temp = temp_target; + } + + /* Handle calls that return BLKmode values in registers. */ + else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) + { + rtx temp_target = gen_reg_rtx (GET_MODE (temp)); + copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp)); + temp = temp_target; + } + + /* If the value has aggregate type and an integral mode then, if BITSIZE + is narrower than this mode and this is for big-endian data, we first + need to put the value into the low-order bits for store_bit_field, + except when MODE is BLKmode and BITSIZE larger than the word size + (see the handling of fields larger than a word in store_bit_field). + Moreover, the field may be not aligned on a byte boundary; in this + case, if it has reverse storage order, it needs to be accessed as a + scalar field with reverse storage order and we must first put the + value into target order. */ + if (AGGREGATE_TYPE_P (TREE_TYPE (exp)) && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT) { HOST_WIDE_INT size = GET_MODE_BITSIZE (GET_MODE (temp)); @@ -6849,7 +6872,8 @@ store_field (rtx target, HOST_WIDE_INT b temp = flip_storage_order (GET_MODE (temp), temp); if (bitsize < size - && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) + && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN + && !(mode == BLKmode && bitsize > BITS_PER_WORD)) temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp, size - bitsize, NULL_RTX, 1); } @@ -6859,12 +6883,10 @@ store_field (rtx target, HOST_WIDE_INT b && mode != TYPE_MODE (TREE_TYPE (exp))) temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1); - /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET - are both BLKmode, both must be in memory and BITPOS must be aligned - on a byte boundary. If so, we simply do a block copy. Likewise for - a BLKmode-like TARGET. */ - if (GET_CODE (temp) != PARALLEL - && GET_MODE (temp) == BLKmode + /* If the mode of TEMP and TARGET is BLKmode, both must be in memory + and BITPOS must be aligned on a byte boundary. If so, we simply do + a block copy. Likewise for a BLKmode-like TARGET. */ + if (GET_MODE (temp) == BLKmode && (GET_MODE (target) == BLKmode || (MEM_P (target) && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT @@ -6883,31 +6905,9 @@ store_field (rtx target, HOST_WIDE_INT b return const0_rtx; } - /* Handle calls that return values in multiple non-contiguous locations. - The Irix 6 ABI has examples of this. */ - if (GET_CODE (temp) == PARALLEL) - { - HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); - machine_mode temp_mode - = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT); - rtx temp_target = gen_reg_rtx (temp_mode); - emit_group_store (temp_target, temp, TREE_TYPE (exp), size); - temp = temp_target; - } - - /* Handle calls that return BLKmode values in registers. */ - else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) - { - rtx temp_target = gen_reg_rtx (GET_MODE (temp)); - copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp)); - temp = temp_target; - } - - /* The behavior of store_bit_field is awkward when mode is BLKmode: - it always takes its value from the lsb up to the word size but - expects it left justified beyond it. At this point TEMP is left - justified so extract the value in the former case. */ - if (mode == BLKmode && bitsize <= BITS_PER_WORD) + /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the + word size, we need to load the value (see again store_bit_field). */ + if (GET_MODE (temp) == BLKmode && bitsize <= BITS_PER_WORD) { machine_mode temp_mode = smallest_mode_for_size (bitsize, MODE_INT); temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,