From patchwork Thu Jan 12 17:15:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanimir Varbanov X-Patchwork-Id: 91216 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1759678qgi; Thu, 12 Jan 2017 10:41:39 -0800 (PST) X-Received: by 10.99.176.14 with SMTP id h14mr19169121pgf.22.1484246498977; Thu, 12 Jan 2017 10:41:38 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d2si10045990pli.105.2017.01.12.10.41.38; Thu, 12 Jan 2017 10:41:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750885AbdALRPk (ORCPT + 25 others); Thu, 12 Jan 2017 12:15:40 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:38904 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750971AbdALRPQ (ORCPT ); Thu, 12 Jan 2017 12:15:16 -0500 Received: by mail-wm0-f50.google.com with SMTP id r144so30463695wme.1 for ; Thu, 12 Jan 2017 09:15:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=DgQjSZlXfwCz3ppA0Vv8D0b5Q7Cd1UOheCM7RxuLK/Y=; b=dk4NOfOM7BdhBBOezLfaaZEqx4tCDe2lp9RWo5/DiPlWHAwpu40f6urkmYE845O6Nf HE2Hwegz5KgvqlAPOEees2fHBOIfSz5dngBz2EPQYrAA9AUhsIyWORPfOnen28r7peEJ mP/B76/rLdREW6Pdo0Wk2INt43oFcHPHgLCe0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=DgQjSZlXfwCz3ppA0Vv8D0b5Q7Cd1UOheCM7RxuLK/Y=; b=ufCTlrFxTSjZmVY4Z08PZQejWAMpdLVmmxF2wjVkH4o4apXpCmaYfRQNluTegbCgFV zdtpiSsZ6KSsT4qpEuPWiAwJiE+3ADLrTJQuvApW2MP6fF1TbMDOhQaYUvHPEXSjkuby B5Zw9uJU58DAS6GJo1lY4XlmkvsZWIJhdpZqvXkL2vRCuLAC0UV7cR7RIG+odNu7h+kb hsOUAD1TmqhE8yyzxBHwPes64qQE/PcNcqzy9D97coz1TU5mhT4XzWXhJWMU2N8W8PU/ Py14E8YSPVfPQYqCT+TNY9K/My3jp+BdFr6foxgSvETefSGm+3TLp/PWDNNbHuEVewM2 Gk+w== X-Gm-Message-State: AIkVDXKenTlNcWbiMijzvl/JtYHJSnwJFYUom0pa+awmTo9pKPUWFyU28+YgfUdyYDN+ztNR X-Received: by 10.223.138.220 with SMTP id z28mr7860873wrz.26.1484241314663; Thu, 12 Jan 2017 09:15:14 -0800 (PST) Received: from mms-0440.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.gmail.com with ESMTPSA id b15sm4290103wma.5.2017.01.12.09.15.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 Jan 2017 09:15:14 -0800 (PST) From: Stanimir Varbanov To: Andy Gross Cc: Bjorn Andersson , Stephen Boyd , Srinivas Kandagatla , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Stanimir Varbanov Subject: [PATCH] firmware: qcom: scm: add a video command for state setting Date: Thu, 12 Jan 2017 19:15:05 +0200 Message-Id: <1484241305-32565-1-git-send-email-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This scm call is used to change the video core state, more specifically it is used to suspend and resume the core. Signed-off-by: Stanimir Varbanov --- Removed crypto clock enabling, which is not needed. drivers/firmware/qcom_scm-32.c | 18 ++++++++++++++++++ drivers/firmware/qcom_scm-64.c | 16 ++++++++++++++++ drivers/firmware/qcom_scm.c | 6 ++++++ drivers/firmware/qcom_scm.h | 2 ++ include/linux/qcom_scm.h | 2 ++ 5 files changed, 44 insertions(+) -- 2.7.4 diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index c6aeedbdcbb0..82c1d8d0d36b 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -560,3 +560,21 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) return ret ? : le32_to_cpu(out); } + +int __qcom_scm_video_set_state(struct device *dev, u32 state, u32 spare) +{ + struct { + __le32 state; + __le32 spare; + } req; + __le32 scm_ret = 0; + int ret; + + req.state = cpu_to_le32(state); + req.spare = cpu_to_le32(spare); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_VIDEO_SET_STATE, + &req, sizeof(req), &scm_ret, sizeof(scm_ret)); + + return ret ? : le32_to_cpu(scm_ret); +} diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 4a0f5ead4fb5..68484ea2aa51 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -358,3 +358,19 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) return ret ? : res.a1; } + +int __qcom_scm_video_set_state(struct device *dev, u32 state, u32 spare) +{ + struct qcom_scm_desc desc = {0}; + struct arm_smccc_res res; + int ret; + + desc.args[0] = state; + desc.args[1] = spare; + desc.arginfo = QCOM_SCM_ARGS(2); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_VIDEO_SET_STATE, + &desc, &res); + + return ret ? : res.a1; +} diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 893f953eaccf..95d13d8e8871 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -324,6 +324,12 @@ bool qcom_scm_is_available(void) } EXPORT_SYMBOL(qcom_scm_is_available); +int qcom_scm_video_set_state(u32 state, u32 spare) +{ + return __qcom_scm_video_set_state(__scm->dev, state, spare); +} +EXPORT_SYMBOL(qcom_scm_video_set_state); + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 3584b00fe7e6..4830559b2639 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -15,6 +15,8 @@ #define QCOM_SCM_SVC_BOOT 0x1 #define QCOM_SCM_BOOT_ADDR 0x1 #define QCOM_SCM_BOOT_ADDR_MC 0x11 +#define QCOM_SCM_VIDEO_SET_STATE 0xa +extern int __qcom_scm_video_set_state(struct device *dev, u32 state, u32 spare); #define QCOM_SCM_FLAG_HLOS 0x01 #define QCOM_SCM_FLAG_COLDBOOT_MC 0x02 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index cc32ab852fbc..2ece81a6b078 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -46,4 +46,6 @@ extern void qcom_scm_cpu_power_down(u32 flags); extern u32 qcom_scm_get_version(void); +extern int qcom_scm_video_set_state(u32 state, u32 spare); + #endif