From patchwork Tue Jan 17 13:45:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 91651 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp498729qgi; Tue, 17 Jan 2017 05:53:02 -0800 (PST) X-Received: by 10.99.123.68 with SMTP id k4mr46874822pgn.101.1484661182453; Tue, 17 Jan 2017 05:53:02 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t6si25008640plm.337.2017.01.17.05.53.02; Tue, 17 Jan 2017 05:53:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751146AbdAQNw7 (ORCPT + 4 others); Tue, 17 Jan 2017 08:52:59 -0500 Received: from mail-wm0-f44.google.com ([74.125.82.44]:33971 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751140AbdAQNwy (ORCPT ); Tue, 17 Jan 2017 08:52:54 -0500 Received: by mail-wm0-f44.google.com with SMTP id f73so39173953wmf.1 for ; Tue, 17 Jan 2017 05:52:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m/Zuy2awYirv7DhS3Dbk+BLPrGFMbzhM/VMkWVNZwuA=; b=tzsG+9Rb88to2mc4S/Pu406macOlChzk4qIEmvDzIKb9BzrbSrH/0hX6Z4ExcPmhju FIZ37GAnOJ1/vQCDmz8IhNQH18XLP0sC2N6YFZ7q0NTa0cN0ukCcBPcib2ip6veI0gB2 yfKO/oLaNz38JHnbq0NjtGSQ/cct+/W+PKIM8KgZMui2V0VKwPi74WEmZLrXlpWIELxG TQzVF91qwkS3BwTlvZ7BeyfrCw54jNH5jt8kR0uxoig1DkD+ytB5ST8fwg9qXpPh3MgH PxvILBISL7g63ZfIXODJJnAR9ubcz14sdbVHcC45B9BlvaP/QQ4k1ADgKLXoMgleQyfu BrqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m/Zuy2awYirv7DhS3Dbk+BLPrGFMbzhM/VMkWVNZwuA=; b=TZwQfkfgHbT9sk+7ygkIVnBnbPukYWc4ZSGXwujxFl7ILmn07KCMSGV6fOar3+ZWn4 iiCZ8uCKjTRGIJjfoOeIU9Zl//365CEKXGVC1vE3uep5w9w309DHUFQazS+HL361VV7c r1bVpA8dOJJBvIlvutMxVf3Q9/gHqSP6TfzsD4MWZAvE6TLhG5+vDKozyhW83jBQt8PH O4T6SyQxmZR18IHSaEpDsZWbRQR48wOQSBXU8P+gi4NBcjE9XhoonEaB0pKmb2bw+yhN l5qFXZhYEEruw4p0sk+CGsjXr5BGkoXm//bMCHC2I6dL+4sXaMCrao0PXP1nC0AD1m7B vk2A== X-Gm-Message-State: AIkVDXI02bL0U4myRrpfNKSc4/wZ5KqIb9Yz1P6bOclITGDrTTDsbKjcWFXFfdutv5TqY0pj X-Received: by 10.223.146.39 with SMTP id 36mr11840961wrj.85.1484660755554; Tue, 17 Jan 2017 05:45:55 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id l187sm37064811wml.6.2017.01.17.05.45.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 17 Jan 2017 05:45:55 -0800 (PST) From: Alexandre Bailon To: vinod.koul@intel.com, b-liu@ti.com, robh+dt@kernel.org Cc: dmaengine@vger.kernel.org, nsekhar@ti.com, khilman@baylibre.com, ptitiano@baylibre.com, tony@atomide.com, linux-omap@vger.kernel.org, sergei.shtylyov@cogentembedded.com, devicetree@vger.kernel.org, Alexandre Bailon Subject: [PATCH v2 5/7] dmaengine: cppi41: Move some constants to glue layer Date: Tue, 17 Jan 2017 14:45:38 +0100 Message-Id: <20170117134540.9988-6-abailon@baylibre.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170117134540.9988-1-abailon@baylibre.com> References: <20170117134540.9988-1-abailon@baylibre.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Some constants are defined and use by the driver whereas they are specifics to AM335x. Add new variables to the glue layer, initialize them with the constants, and use them in the driver. Signed-off-by: Alexandre Bailon --- drivers/dma/cppi41.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c index 5527376..3b2f57f 100644 --- a/drivers/dma/cppi41.c +++ b/drivers/dma/cppi41.c @@ -68,7 +68,6 @@ #define QMGR_MEMCTRL_IDX_SH 16 #define QMGR_MEMCTRL_DESC_SH 8 -#define QMGR_NUM_PEND 5 #define QMGR_PEND(x) (0x90 + (x) * 4) #define QMGR_PENDING_SLOT_Q(x) (x / 32) @@ -138,6 +137,8 @@ struct cppi41_dd { const struct chan_queues *queues_rx; const struct chan_queues *queues_tx; struct chan_queues td_queue; + u16 first_completion_queue; + u16 qmgr_num_pend; struct list_head pending; /* Pending queued transfers */ spinlock_t lock; /* Lock for pending list */ @@ -146,7 +147,6 @@ struct cppi41_dd { unsigned int dma_tdfdq; }; -#define FIST_COMPLETION_QUEUE 93 static struct chan_queues am335x_usb_queues_tx[] = { /* USB0 ENDP 1 */ [ 0] = { .submit = 32, .complete = 93}, @@ -224,6 +224,8 @@ struct cppi_glue_infos { const struct chan_queues *queues_rx; const struct chan_queues *queues_tx; struct chan_queues td_queue; + u16 first_completion_queue; + u16 qmgr_num_pend; }; static struct cppi41_channel *to_cpp41_chan(struct dma_chan *c) @@ -278,19 +280,21 @@ static u32 cppi41_pop_desc(struct cppi41_dd *cdd, unsigned queue_num) static irqreturn_t cppi41_irq(int irq, void *data) { struct cppi41_dd *cdd = data; + u16 first_completion_queue = cdd->first_completion_queue; + u16 qmgr_num_pend = cdd->qmgr_num_pend; struct cppi41_channel *c; int i; - for (i = QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE); i < QMGR_NUM_PEND; + for (i = QMGR_PENDING_SLOT_Q(first_completion_queue); i < qmgr_num_pend; i++) { u32 val; u32 q_num; val = cppi_readl(cdd->qmgr_mem + QMGR_PEND(i)); - if (i == QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE) && val) { + if (i == QMGR_PENDING_SLOT_Q(first_completion_queue) && val) { u32 mask; /* set corresponding bit for completetion Q 93 */ - mask = 1 << QMGR_PENDING_BIT_Q(FIST_COMPLETION_QUEUE); + mask = 1 << QMGR_PENDING_BIT_Q(first_completion_queue); /* not set all bits for queues less than Q 93 */ mask--; /* now invert and keep only Q 93+ set */ @@ -862,7 +866,7 @@ static int init_cppi41(struct device *dev, struct cppi41_dd *cdd) return -ENOMEM; cppi_writel(cdd->scratch_phys, cdd->qmgr_mem + QMGR_LRAM0_BASE); - cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE); + cppi_writel(TOTAL_DESCS_NUM, cdd->qmgr_mem + QMGR_LRAM_SIZE); cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE); ret = init_descs(dev, cdd); @@ -945,6 +949,8 @@ static const struct cppi_glue_infos am335x_usb_infos = { .queues_rx = am335x_usb_queues_rx, .queues_tx = am335x_usb_queues_tx, .td_queue = { .submit = 31, .complete = 0 }, + .first_completion_queue = 93, + .qmgr_num_pend = 5, }; static const struct of_device_id cppi41_dma_ids[] = { @@ -1021,6 +1027,8 @@ static int cppi41_dma_probe(struct platform_device *pdev) cdd->queues_rx = glue_info->queues_rx; cdd->queues_tx = glue_info->queues_tx; cdd->td_queue = glue_info->td_queue; + cdd->qmgr_num_pend = glue_info->qmgr_num_pend; + cdd->first_completion_queue = glue_info->first_completion_queue; ret = init_cppi41(dev, cdd); if (ret)