diff mbox series

[01/10] target/arm: Drop IS_M() macro

Message ID 1485285380-10565-2-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show
Series More M profile bugfixes | expand

Commit Message

Peter Maydell Jan. 24, 2017, 7:16 p.m. UTC
We only use the IS_M() macro in two places, and it's a bit of a
namespace grab to put in cpu.h.  Drop it in favour of just explicitly
calling arm_feature() in the places where it was used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/cpu.h    | 6 ------
 target/arm/cpu.c    | 2 +-
 target/arm/helper.c | 2 +-
 3 files changed, 2 insertions(+), 8 deletions(-)

-- 
2.7.4

Comments

Alex Bennée Jan. 27, 2017, 12:33 p.m. UTC | #1
Peter Maydell <peter.maydell@linaro.org> writes:

> We only use the IS_M() macro in two places, and it's a bit of a

> namespace grab to put in cpu.h.  Drop it in favour of just explicitly

> calling arm_feature() in the places where it was used.

>

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  target/arm/cpu.h    | 6 ------

>  target/arm/cpu.c    | 2 +-

>  target/arm/helper.c | 2 +-

>  3 files changed, 2 insertions(+), 8 deletions(-)

>

> diff --git a/target/arm/cpu.h b/target/arm/cpu.h

> index 521c11b..b2cc329 100644

> --- a/target/arm/cpu.h

> +++ b/target/arm/cpu.h

> @@ -1762,12 +1762,6 @@ bool write_list_to_cpustate(ARMCPU *cpu);

>   */

>  bool write_cpustate_to_list(ARMCPU *cpu);

>

> -/* Does the core conform to the "MicroController" profile. e.g. Cortex-M3.

> -   Note the M in older cores (eg. ARM7TDMI) stands for Multiply. These are

> -   conventional cores (ie. Application or Realtime profile).  */

> -

> -#define IS_M(env) arm_feature(env, ARM_FEATURE_M)

> -

>  #define ARM_CPUID_TI915T      0x54029152

>  #define ARM_CPUID_TI925T      0x54029252

>

> diff --git a/target/arm/cpu.c b/target/arm/cpu.c

> index 9075989..6395d5a 100644

> --- a/target/arm/cpu.c

> +++ b/target/arm/cpu.c

> @@ -182,7 +182,7 @@ static void arm_cpu_reset(CPUState *s)

>      /* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is

>       * clear at reset. Initial SP and PC are loaded from ROM.

>       */

> -    if (IS_M(env)) {

> +    if (arm_feature(env, ARM_FEATURE_M)) {

>          uint32_t initial_msp; /* Loaded from 0x0 */

>          uint32_t initial_pc; /* Loaded from 0x4 */

>          uint8_t *rom;

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index cfbc622..ce7e43b 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -6695,7 +6695,7 @@ void arm_cpu_do_interrupt(CPUState *cs)

>      CPUARMState *env = &cpu->env;

>      unsigned int new_el = env->exception.target_el;

>

> -    assert(!IS_M(env));

> +    assert(!arm_feature(env, ARM_FEATURE_M));

>

>      arm_log_exception(cs->exception_index);

>      qemu_log_mask(CPU_LOG_INT, "...from EL%d to EL%d\n", arm_current_el(env),



--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 521c11b..b2cc329 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1762,12 +1762,6 @@  bool write_list_to_cpustate(ARMCPU *cpu);
  */
 bool write_cpustate_to_list(ARMCPU *cpu);
 
-/* Does the core conform to the "MicroController" profile. e.g. Cortex-M3.
-   Note the M in older cores (eg. ARM7TDMI) stands for Multiply. These are
-   conventional cores (ie. Application or Realtime profile).  */
-
-#define IS_M(env) arm_feature(env, ARM_FEATURE_M)
-
 #define ARM_CPUID_TI915T      0x54029152
 #define ARM_CPUID_TI925T      0x54029252
 
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 9075989..6395d5a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -182,7 +182,7 @@  static void arm_cpu_reset(CPUState *s)
     /* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is
      * clear at reset. Initial SP and PC are loaded from ROM.
      */
-    if (IS_M(env)) {
+    if (arm_feature(env, ARM_FEATURE_M)) {
         uint32_t initial_msp; /* Loaded from 0x0 */
         uint32_t initial_pc; /* Loaded from 0x4 */
         uint8_t *rom;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index cfbc622..ce7e43b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6695,7 +6695,7 @@  void arm_cpu_do_interrupt(CPUState *cs)
     CPUARMState *env = &cpu->env;
     unsigned int new_el = env->exception.target_el;
 
-    assert(!IS_M(env));
+    assert(!arm_feature(env, ARM_FEATURE_M));
 
     arm_log_exception(cs->exception_index);
     qemu_log_mask(CPU_LOG_INT, "...from EL%d to EL%d\n", arm_current_el(env),