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Wed, 25 Jan 2017 11:56:00 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Inki Dae Subject: [PATCH 4/8] arm64: dts: exynos: Add MSCL power domain to Exynos 5433 SoC Date: Wed, 25 Jan 2017 12:55:38 +0100 Message-id: <1485345342-3273-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMIsWRmVeSWpSXmKPExsWy7djPc7qBkzoiDOZtYLXYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKC6b lNSczLLUIn27BK6MidOesRa8567oa25lamDcydnFyMkhIWAicf/peXYIW0ziwr31bF2MXBxC AksZJd40XmOBcD4zSsxfsg7I4QDr6N0iCRFfxijxuncdM4TTwCQx79tvFpBRbAKGEl1vu9hA bBEBe4nbT5axgxQxC7QxSey61cYKMklYIFhi5U5xkBoWAVWJlQc6WEFsXgF3iY1NO9kgTpKT OHlsMlicU8BDoutpPxPIHAmB12wSl3ddZYK4SFZi0wFmiHoXiY93r0H1Cku8Or4F6jUZic6O g0wQdj+jRFOrNoQ9g1Hi3FteCNta4vDxi2C7mAX4JCZtm84MMZ5XoqNNCKLEQ+LJteMsELaj xOb+pewQv89mlGh8/Y51AqPMAkaGVYwiqaXFuempxSZ6xYm5xaV56XrJ+bmbGIFRe/rf8S87 GBcfszrEKMDBqMTD+yKlPUKINbGsuDL3EKMEB7OSCK/0xI4IId6UxMqq1KL8+KLSnNTiQ4zS HCxK4rx7FlwJFxJITyxJzU5NLUgtgskycXBKNTB2mTB5z7wzhy1qsf6pijnMbOfOPrFj/cYR dF4p2Obgvsf3ZXsjhPs1nWPOv4sK45G6piHwqn+hziINs2NTT4s5x1zxmj/p8+H8L44ztzam 9d1Y92WvsdnmKUufnPRVuseRO3v9uiO2FnGqb8Vtcn+axdaeWLFp0ZGY9fb8C9tkujZ5Htr4 ukNDiaU4I9FQi7moOBEAjNENSNYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xK7r9kzoiDGZMMLXYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKDeb jNTElNQihdS85PyUzLx0W6XQEDddCyWFvMTcVFulCF3fkCAlhbLEnFIgz8gADTg4B7gHK+nb JbhlTJz2jLXgPXdFX3MrUwPjTs4uRg4OCQETid4tkl2MnECmmMSFe+vZuhi5OIQEljBK3G97 zArhNDFJNHzZzgRSxSZgKNH1tosNxBYRsJe4/WQZO0gRs0AHk8S/Oy1gCWGBYIm1k9eB2SwC qhIrD3Swgti8Au4SG5t2skGsk5M4eWwyWJxTwEOi62k/2AIhoJqpN9eyTGDkXcDIsIpRJLW0 ODc9t9hQrzgxt7g0L10vOT93EyMwhLcd+7l5B+OljcGHGAU4GJV4eCcktUcIsSaWFVfmHmKU 4GBWEuF1aOmIEOJNSaysSi3Kjy8qzUktPsRoCnTURGYp0eR8YHzllcQbmhiaWxoaGVtYmBsZ KYnzlny4Ei4kkJ5YkpqdmlqQWgTTx8TBKdXAqJtu6b5Ps0rqTV3ajKlzW9NTTV0C3+spHPLc EiJt5LzCenPuGrdDuQqLP4f8/miUeyLj6KzcDJUJM9/css+JLPzP4OD6Qk9QWtac47qc4J5T XMrndnfNqLys5MT0qJirQXzhzA9nBP+vFNP2vrn4oqtqV0bqh1mKMf5rPku0/PA3MzM++Wab EktxRqKhFnNRcSIA2owirHcCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170125115600eucas1p1df640bb3f1033a103f7dea3d384c3b4e X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170125115600eucas1p1df640bb3f1033a103f7dea3d384c3b4e X-RootMTR: 20170125115600eucas1p1df640bb3f1033a103f7dea3d384c3b4e References: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support for MSCL power domain to Exynos 5433 SoCs, which contains following devices: a clock controller, JPEG codec device and its SYSMMU. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index a84b44cea2a8..5778fdbd5763 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -458,6 +458,7 @@ clocks = <&xxti>, <&cmu_top CLK_SCLK_JPEG_MSCL>, <&cmu_top CLK_ACLK_MSCL_400>; + power-domains = <&pd_mscl>; }; cmu_mfc: clock-controller@15280000 { @@ -533,6 +534,12 @@ #power-domain-cells = <0>; }; + pd_mscl: mscl-power-domain@105c4040 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4040 0x20>; + #power-domain-cells = <0>; + }; + pd_disp: disp-power-domain@105c4080 { compatible = "samsung,exynos5433-pd"; reg = <0x105c4080 0x20>; @@ -951,6 +958,7 @@ <&cmu_mscl CLK_ACLK_XIU_MSCLX>, <&cmu_mscl CLK_SCLK_JPEG>; iommus = <&sysmmu_jpeg>; + power-domains = <&pd_mscl>; }; mfc: codec@152E0000 { @@ -1050,6 +1058,7 @@ clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>, <&cmu_mscl CLK_ACLK_SMMU_JPEG>; #iommu-cells = <0>; + power-domains = <&pd_mscl>; }; sysmmu_mfc_0: sysmmu@15200000 {