[Linaro-uefi,1/9] Platforms/Hisilicon/HiKey: append more register definitions

Message ID 1486185234-23675-2-git-send-email-haojian.zhuang@linaro.org
State Superseded
Headers show
Series
  • enable Android Fastboot App on HiKey
Related show

Commit Message

Haojian Zhuang Feb. 4, 2017, 5:13 a.m.
Add more register definitions in Hi6220 SoC.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 Chips/Hisilicon/Hi6220/Include/Hi6220.h | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Leif Lindholm Feb. 5, 2017, 12:38 p.m. | #1
On Sat, Feb 04, 2017 at 01:13:46PM +0800, Haojian Zhuang wrote:
> Add more register definitions in Hi6220 SoC.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> ---
>  Chips/Hisilicon/Hi6220/Include/Hi6220.h | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
> index 203424a..0bc270e 100644
> --- a/Chips/Hisilicon/Hi6220/Include/Hi6220.h
> +++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
> @@ -48,15 +48,41 @@
>  #define SC_PERIPH_CLKDIS0                       0x204
>  #define SC_PERIPH_CLKSTAT0                      0x208
>  
> +#define SC_PERIPH_CLKEN3                        0x230
> +#define SC_PERIPH_RSTEN3                        0x330

Can this be inserted numerically sorted? (after SC_PERIPH_RSTSTAT0)

>  #define SC_PERIPH_RSTEN0                        0x300
>  #define SC_PERIPH_RSTDIS0                       0x304
>  #define SC_PERIPH_RSTSTAT0                      0x308
> +#define SC_PERIPH_RSTDIS3                       0x334
> +#define SC_PERIPH_RSTSTAT3                      0x338
>  
>  #define RST0_USBOTG_BUS                         BIT4
>  #define RST0_POR_PICOPHY                        BIT5
>  #define RST0_USBOTG                             BIT6
>  #define RST0_USBOTG_32K                         BIT7
>  
> +/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */
> +#define PERIPH_RST0_MMC2                        (1 << 2)
> +
> +/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */
> +#define PERIPH_RST3_CSSYS                       (1 << 0)
> +#define PERIPH_RST3_I2C0                        (1 << 1)
> +#define PERIPH_RST3_I2C1                        (1 << 2)
> +#define PERIPH_RST3_I2C2                        (1 << 3)
> +#define PERIPH_RST3_I2C3                        (1 << 4)
> +#define PERIPH_RST3_UART1                       (1 << 5)
> +#define PERIPH_RST3_UART2                       (1 << 6)
> +#define PERIPH_RST3_UART3                       (1 << 7)
> +#define PERIPH_RST3_UART4                       (1 << 8)
> +#define PERIPH_RST3_SSP                         (1 << 9)
> +#define PERIPH_RST3_PWM                         (1 << 10)
> +#define PERIPH_RST3_BLPWM                       (1 << 11)
> +#define PERIPH_RST3_TSENSOR                     (1 << 12)
> +#define PERIPH_RST3_DAPB                        (1 << 18)
> +#define PERIPH_RST3_HKADC                       (1 << 19)
> +#define PERIPH_RST3_CODEC_SSI                   (1 << 20)
> +#define PERIPH_RST3_PMUSSI1                     (1 << 22)
> +
>  #define EYE_PATTERN_PARA                        0x7053348c
>  
>  #define MDDRC_AXI_BASE                          0xF7120000
> @@ -74,4 +100,7 @@
>  
>  #define PMUSSI_BASE                             0xF8000000
>  
> +#define PMUSSI_REG(x)                           (PMUSSI_BASE + ((x) << 2))
> +
> +
>  #endif /* __HI6220_H__ */
> -- 
> 2.7.4
>

Patch

diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
index 203424a..0bc270e 100644
--- a/Chips/Hisilicon/Hi6220/Include/Hi6220.h
+++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
@@ -48,15 +48,41 @@ 
 #define SC_PERIPH_CLKDIS0                       0x204
 #define SC_PERIPH_CLKSTAT0                      0x208
 
+#define SC_PERIPH_CLKEN3                        0x230
+#define SC_PERIPH_RSTEN3                        0x330
 #define SC_PERIPH_RSTEN0                        0x300
 #define SC_PERIPH_RSTDIS0                       0x304
 #define SC_PERIPH_RSTSTAT0                      0x308
+#define SC_PERIPH_RSTDIS3                       0x334
+#define SC_PERIPH_RSTSTAT3                      0x338
 
 #define RST0_USBOTG_BUS                         BIT4
 #define RST0_POR_PICOPHY                        BIT5
 #define RST0_USBOTG                             BIT6
 #define RST0_USBOTG_32K                         BIT7
 
+/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */
+#define PERIPH_RST0_MMC2                        (1 << 2)
+
+/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */
+#define PERIPH_RST3_CSSYS                       (1 << 0)
+#define PERIPH_RST3_I2C0                        (1 << 1)
+#define PERIPH_RST3_I2C1                        (1 << 2)
+#define PERIPH_RST3_I2C2                        (1 << 3)
+#define PERIPH_RST3_I2C3                        (1 << 4)
+#define PERIPH_RST3_UART1                       (1 << 5)
+#define PERIPH_RST3_UART2                       (1 << 6)
+#define PERIPH_RST3_UART3                       (1 << 7)
+#define PERIPH_RST3_UART4                       (1 << 8)
+#define PERIPH_RST3_SSP                         (1 << 9)
+#define PERIPH_RST3_PWM                         (1 << 10)
+#define PERIPH_RST3_BLPWM                       (1 << 11)
+#define PERIPH_RST3_TSENSOR                     (1 << 12)
+#define PERIPH_RST3_DAPB                        (1 << 18)
+#define PERIPH_RST3_HKADC                       (1 << 19)
+#define PERIPH_RST3_CODEC_SSI                   (1 << 20)
+#define PERIPH_RST3_PMUSSI1                     (1 << 22)
+
 #define EYE_PATTERN_PARA                        0x7053348c
 
 #define MDDRC_AXI_BASE                          0xF7120000
@@ -74,4 +100,7 @@ 
 
 #define PMUSSI_BASE                             0xF8000000
 
+#define PMUSSI_REG(x)                           (PMUSSI_BASE + ((x) << 2))
+
+
 #endif /* __HI6220_H__ */