| Message ID | 1486998621-30420-4-git-send-email-haojian.zhuang@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | add drivers for Android Fastboot App on HiKey | expand |
On Mon, Feb 13, 2017 at 11:10:19PM +0800, Haojian Zhuang wrote: > Enable all PL061 GPIO controllers on HiKey platform. Without this, > only one PL061 GPIO controller could be supported on HiKey platform. > So, this is a huge improvement (if anything you have gone slightly too far with the macros :), but a few comments below: > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > Chips/Hisilicon/Hi6220/Include/Hi6220.h | 22 +++++ > .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c | 96 ++++++++++++++++++++++ > .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf | 38 +++++++++ > 3 files changed, 156 insertions(+) > create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c > create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf > > diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h > index 6b87524..5340423 100644 > --- a/Chips/Hisilicon/Hi6220/Include/Hi6220.h > +++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h > @@ -23,6 +23,23 @@ > #define HI6220_PERIPH_BASE 0xF4000000 > #define HI6220_PERIPH_SZ 0x05800000 > > +#define GPIO4_CTRL_BASE 0xF7020000 > +#define GPIO5_CTRL_BASE 0xF7021000 > +#define GPIO6_CTRL_BASE 0xF7022000 > +#define GPIO7_CTRL_BASE 0xF7023000 > +#define GPIO8_CTRL_BASE 0xF7024000 > +#define GPIO9_CTRL_BASE 0xF7025000 > +#define GPIO10_CTRL_BASE 0xF7026000 > +#define GPIO11_CTRL_BASE 0xF7027000 > +#define GPIO12_CTRL_BASE 0xF7028000 > +#define GPIO13_CTRL_BASE 0xF7029000 > +#define GPIO14_CTRL_BASE 0xF702A000 > +#define GPIO15_CTRL_BASE 0xF702B000 > +#define GPIO16_CTRL_BASE 0xF702C000 > +#define GPIO17_CTRL_BASE 0xF702D000 > +#define GPIO18_CTRL_BASE 0xF702E000 > +#define GPIO19_CTRL_BASE 0xF702F000 > + > #define PERI_CTRL_BASE 0xF7030000 > #define SC_PERIPH_CTRL4 0x00C > #define CTRL4_FPGA_EXT_PHY_SEL BIT3 > @@ -102,5 +119,10 @@ > > #define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) > > +#define GPIO0_CTRL_BASE 0xF8011000 > +#define GPIO1_CTRL_BASE 0xF8012000 > +#define GPIO2_CTRL_BASE 0xF8013000 > +#define GPIO3_CTRL_BASE 0xF8014000 > + > > #endif /* __HI6220_H__ */ > diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c > new file mode 100644 > index 0000000..52ff299 > --- /dev/null > +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c > @@ -0,0 +1,96 @@ > +/** @file > +* > +* Copyright (c) 2015-2017, Linaro. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Drivers/PL061Gpio.h> > + > +#include <Library/UefiBootServicesTableLib.h> > + > +#include <Protocol/EmbeddedGpio.h> > + > +#include <Hi6220.h> > + > +#define GPIO0_CTRL_PIN_BASE 0 > +#define GPIO1_CTRL_PIN_BASE (GPIO0_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO2_CTRL_PIN_BASE (GPIO1_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO3_CTRL_PIN_BASE (GPIO2_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO4_CTRL_PIN_BASE (GPIO3_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO5_CTRL_PIN_BASE (GPIO4_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO6_CTRL_PIN_BASE (GPIO5_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO7_CTRL_PIN_BASE (GPIO6_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO8_CTRL_PIN_BASE (GPIO7_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO9_CTRL_PIN_BASE (GPIO8_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO10_CTRL_PIN_BASE (GPIO9_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO11_CTRL_PIN_BASE (GPIO10_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO12_CTRL_PIN_BASE (GPIO11_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO13_CTRL_PIN_BASE (GPIO12_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO14_CTRL_PIN_BASE (GPIO13_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO15_CTRL_PIN_BASE (GPIO14_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO16_CTRL_PIN_BASE (GPIO15_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO17_CTRL_PIN_BASE (GPIO16_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO18_CTRL_PIN_BASE (GPIO17_CTRL_PIN_BASE + PL061_GPIO_PINS) > +#define GPIO19_CTRL_PIN_BASE (GPIO18_CTRL_PIN_BASE + PL061_GPIO_PINS) These don't actually need to be individually calculated - the important bit is getting the magic constants out of the .c file. I would have happily accepted a hard-coded enumeration, (0, 8, 16, 24, ...). Certainly (0 * PL061_GPIO_PINS), (1 * PL061_GPIO_PINS), (2 * PL061_GPIO_PINS) would be more than sufficient. > + > +#define GPIO_PIN_NUMS (GPIO19_CTRL_PIN_BASE + PL061_GPIO_PINS) This would make more sense semantically as (GPIO_CTRL_NUMS * PL061_GPIO_PINS). > +#define GPIO_CTRL_NUMS 20 > + > +GPIO_CONTROLLER gGpioDevice[]= { > + { GPIO0_CTRL_BASE, GPIO0_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO1_CTRL_BASE, GPIO1_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO2_CTRL_BASE, GPIO2_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO3_CTRL_BASE, GPIO3_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO4_CTRL_BASE, GPIO4_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO5_CTRL_BASE, GPIO5_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO6_CTRL_BASE, GPIO6_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO7_CTRL_BASE, GPIO7_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO8_CTRL_BASE, GPIO8_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO9_CTRL_BASE, GPIO9_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO10_CTRL_BASE, GPIO10_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO11_CTRL_BASE, GPIO11_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO12_CTRL_BASE, GPIO12_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO13_CTRL_BASE, GPIO13_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO14_CTRL_BASE, GPIO14_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO15_CTRL_BASE, GPIO15_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO16_CTRL_BASE, GPIO16_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO17_CTRL_BASE, GPIO17_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO18_CTRL_BASE, GPIO18_CTRL_PIN_BASE, PL061_GPIO_PINS }, > + { GPIO19_CTRL_BASE, GPIO19_CTRL_PIN_BASE, PL061_GPIO_PINS }, > +}; > + > +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { > + GPIO_PIN_NUMS, GPIO_CTRL_NUMS, gGpioDevice > +}; > + > +EFI_STATUS > +EFIAPI > +HiKeyGpioEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + EFI_HANDLE Handle; > + > + // Install the Embedded Platform GPIO Protocol onto a new handle > + Handle = NULL; > + Status = gBS->InstallMultipleProtocolInterfaces( Still needs a space before that '('. > + &Handle, > + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, > + NULL > + ); > + if (EFI_ERROR (Status)) { > + Status = EFI_OUT_OF_RESOURCES; > + } > + > + return Status; > +} > diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf > new file mode 100644 > index 0000000..d69c6f4 > --- /dev/null > +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf > @@ -0,0 +1,38 @@ > +# > +# Copyright (c) 2015-2017, Linaro. All rights reserved. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > + > +[Defines] > + INF_VERSION = 0x00010019 > + BASE_NAME = HiKeyGpio > + FILE_GUID = b51a851c-7bf7-463f-b261-cfb158b7f699 > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = HiKeyGpioEntryPoint > + > +[Sources.common] > + HiKeyGpioDxe.c > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + MdePkg/MdePkg.dec > + OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.dec > + > +[LibraryClasses] > + DebugLib > + UefiDriverEntryPoint > + > +[Protocols] > + gPlatformGpioProtocolGuid > + > +[Depex] > + TRUE > -- > 2.7.4 >
diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h index 6b87524..5340423 100644 --- a/Chips/Hisilicon/Hi6220/Include/Hi6220.h +++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h @@ -23,6 +23,23 @@ #define HI6220_PERIPH_BASE 0xF4000000 #define HI6220_PERIPH_SZ 0x05800000 +#define GPIO4_CTRL_BASE 0xF7020000 +#define GPIO5_CTRL_BASE 0xF7021000 +#define GPIO6_CTRL_BASE 0xF7022000 +#define GPIO7_CTRL_BASE 0xF7023000 +#define GPIO8_CTRL_BASE 0xF7024000 +#define GPIO9_CTRL_BASE 0xF7025000 +#define GPIO10_CTRL_BASE 0xF7026000 +#define GPIO11_CTRL_BASE 0xF7027000 +#define GPIO12_CTRL_BASE 0xF7028000 +#define GPIO13_CTRL_BASE 0xF7029000 +#define GPIO14_CTRL_BASE 0xF702A000 +#define GPIO15_CTRL_BASE 0xF702B000 +#define GPIO16_CTRL_BASE 0xF702C000 +#define GPIO17_CTRL_BASE 0xF702D000 +#define GPIO18_CTRL_BASE 0xF702E000 +#define GPIO19_CTRL_BASE 0xF702F000 + #define PERI_CTRL_BASE 0xF7030000 #define SC_PERIPH_CTRL4 0x00C #define CTRL4_FPGA_EXT_PHY_SEL BIT3 @@ -102,5 +119,10 @@ #define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) +#define GPIO0_CTRL_BASE 0xF8011000 +#define GPIO1_CTRL_BASE 0xF8012000 +#define GPIO2_CTRL_BASE 0xF8013000 +#define GPIO3_CTRL_BASE 0xF8014000 + #endif /* __HI6220_H__ */ diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c new file mode 100644 index 0000000..52ff299 --- /dev/null +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c @@ -0,0 +1,96 @@ +/** @file +* +* Copyright (c) 2015-2017, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include <Drivers/PL061Gpio.h> + +#include <Library/UefiBootServicesTableLib.h> + +#include <Protocol/EmbeddedGpio.h> + +#include <Hi6220.h> + +#define GPIO0_CTRL_PIN_BASE 0 +#define GPIO1_CTRL_PIN_BASE (GPIO0_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO2_CTRL_PIN_BASE (GPIO1_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO3_CTRL_PIN_BASE (GPIO2_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO4_CTRL_PIN_BASE (GPIO3_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO5_CTRL_PIN_BASE (GPIO4_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO6_CTRL_PIN_BASE (GPIO5_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO7_CTRL_PIN_BASE (GPIO6_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO8_CTRL_PIN_BASE (GPIO7_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO9_CTRL_PIN_BASE (GPIO8_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO10_CTRL_PIN_BASE (GPIO9_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO11_CTRL_PIN_BASE (GPIO10_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO12_CTRL_PIN_BASE (GPIO11_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO13_CTRL_PIN_BASE (GPIO12_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO14_CTRL_PIN_BASE (GPIO13_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO15_CTRL_PIN_BASE (GPIO14_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO16_CTRL_PIN_BASE (GPIO15_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO17_CTRL_PIN_BASE (GPIO16_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO18_CTRL_PIN_BASE (GPIO17_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO19_CTRL_PIN_BASE (GPIO18_CTRL_PIN_BASE + PL061_GPIO_PINS) + +#define GPIO_PIN_NUMS (GPIO19_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO_CTRL_NUMS 20 + +GPIO_CONTROLLER gGpioDevice[]= { + { GPIO0_CTRL_BASE, GPIO0_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO1_CTRL_BASE, GPIO1_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO2_CTRL_BASE, GPIO2_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO3_CTRL_BASE, GPIO3_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO4_CTRL_BASE, GPIO4_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO5_CTRL_BASE, GPIO5_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO6_CTRL_BASE, GPIO6_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO7_CTRL_BASE, GPIO7_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO8_CTRL_BASE, GPIO8_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO9_CTRL_BASE, GPIO9_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO10_CTRL_BASE, GPIO10_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO11_CTRL_BASE, GPIO11_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO12_CTRL_BASE, GPIO12_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO13_CTRL_BASE, GPIO13_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO14_CTRL_BASE, GPIO14_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO15_CTRL_BASE, GPIO15_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO16_CTRL_BASE, GPIO16_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO17_CTRL_BASE, GPIO17_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO18_CTRL_BASE, GPIO18_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO19_CTRL_BASE, GPIO19_CTRL_PIN_BASE, PL061_GPIO_PINS }, +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + GPIO_PIN_NUMS, GPIO_CTRL_NUMS, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKeyGpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR (Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf new file mode 100644 index 0000000..d69c6f4 --- /dev/null +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf @@ -0,0 +1,38 @@ +# +# Copyright (c) 2015-2017, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKeyGpio + FILE_GUID = b51a851c-7bf7-463f-b261-cfb158b7f699 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyGpioEntryPoint + +[Sources.common] + HiKeyGpioDxe.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.dec + +[LibraryClasses] + DebugLib + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE
Enable all PL061 GPIO controllers on HiKey platform. Without this, only one PL061 GPIO controller could be supported on HiKey platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> --- Chips/Hisilicon/Hi6220/Include/Hi6220.h | 22 +++++ .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c | 96 ++++++++++++++++++++++ .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf | 38 +++++++++ 3 files changed, 156 insertions(+) create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf