| Message ID | 20170222162507.25987-1-alex.bennee@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 02/22/2017 10:25 AM, Alex Bennée wrote: > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > cpus.c | 6 ++++++ > hmp.c | 3 +++ > qapi-schema.json | 14 +++++++++++++- > 3 files changed, 22 insertions(+), 1 deletion(-) > > +++ b/qapi-schema.json > @@ -1277,7 +1277,7 @@ > # Since: 2.6 > ## > { 'enum': 'CpuInfoArch', > - 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] } > + 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'arm', 'other' ] } Is it possible to document "'arm' since 2.9" somewhere for this enum? Otherwise looks fine to me. -- Eric Blake eblake redhat com +1-919-301-3266 Libvirt virtualization library http://libvirt.org
On 22 February 2017 at 16:25, Alex Bennée <alex.bennee@linaro.org> wrote: > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > cpus.c | 6 ++++++ > hmp.c | 3 +++ > qapi-schema.json | 14 +++++++++++++- > 3 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/cpus.c b/cpus.c > index 559a0805bc..dc8dbfb0f0 100644 > --- a/cpus.c > +++ b/cpus.c > @@ -1869,6 +1869,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) > #elif defined(TARGET_TRICORE) > TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); > CPUTriCoreState *env = &tricore_cpu->env; > +#elif defined(TARGET_AARCH64) > + ARMCPU *arm_cpu = ARM_CPU(cpu); > + CPUARMState *env = &arm_cpu->env; > #endif > > cpu_synchronize_state(cpu); > @@ -1896,6 +1899,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) > #elif defined(TARGET_TRICORE) > info->value->arch = CPU_INFO_ARCH_TRICORE; > info->value->u.tricore.PC = env->PC; > +#elif defined(TARGET_AARCH64) > + info->value->arch = CPU_INFO_ARCH_ARM; > + info->value->u.arm.pc = env->pc; > #else > info->value->arch = CPU_INFO_ARCH_OTHER; > #endif My standard reaction when I see patches adding another arm to a target-ifdef ladder like this is to ask whether we can refactor this so that the target-specific code lives in target/$ARCH instead... thanks -- PMM
* Peter Maydell (peter.maydell@linaro.org) wrote: > On 22 February 2017 at 16:25, Alex Bennée <alex.bennee@linaro.org> wrote: > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > > --- > > cpus.c | 6 ++++++ > > hmp.c | 3 +++ > > qapi-schema.json | 14 +++++++++++++- > > 3 files changed, 22 insertions(+), 1 deletion(-) > > > > diff --git a/cpus.c b/cpus.c > > index 559a0805bc..dc8dbfb0f0 100644 > > --- a/cpus.c > > +++ b/cpus.c > > @@ -1869,6 +1869,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) > > #elif defined(TARGET_TRICORE) > > TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); > > CPUTriCoreState *env = &tricore_cpu->env; > > +#elif defined(TARGET_AARCH64) > > + ARMCPU *arm_cpu = ARM_CPU(cpu); > > + CPUARMState *env = &arm_cpu->env; > > #endif > > > > cpu_synchronize_state(cpu); > > @@ -1896,6 +1899,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) > > #elif defined(TARGET_TRICORE) > > info->value->arch = CPU_INFO_ARCH_TRICORE; > > info->value->u.tricore.PC = env->PC; > > +#elif defined(TARGET_AARCH64) > > + info->value->arch = CPU_INFO_ARCH_ARM; > > + info->value->u.arm.pc = env->pc; > > #else > > info->value->arch = CPU_INFO_ARCH_OTHER; > > #endif > > My standard reaction when I see patches adding another > arm to a target-ifdef ladder like this is to ask whether > we can refactor this so that the target-specific > code lives in target/$ARCH instead... It feels like that should be possible with PC; but then you get the weird outliers; x86 that adds in CS, but OK that could be wrapped up in a target function; and then SPARC that's got pc and npc just to be different. Dave > thanks > -- PMM > -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
diff --git a/cpus.c b/cpus.c index 559a0805bc..dc8dbfb0f0 100644 --- a/cpus.c +++ b/cpus.c @@ -1869,6 +1869,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) #elif defined(TARGET_TRICORE) TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); CPUTriCoreState *env = &tricore_cpu->env; +#elif defined(TARGET_AARCH64) + ARMCPU *arm_cpu = ARM_CPU(cpu); + CPUARMState *env = &arm_cpu->env; #endif cpu_synchronize_state(cpu); @@ -1896,6 +1899,9 @@ CpuInfoList *qmp_query_cpus(Error **errp) #elif defined(TARGET_TRICORE) info->value->arch = CPU_INFO_ARCH_TRICORE; info->value->u.tricore.PC = env->PC; +#elif defined(TARGET_AARCH64) + info->value->arch = CPU_INFO_ARCH_ARM; + info->value->u.arm.pc = env->pc; #else info->value->arch = CPU_INFO_ARCH_OTHER; #endif diff --git a/hmp.c b/hmp.c index 2bc4f062bb..03ef6ffdd7 100644 --- a/hmp.c +++ b/hmp.c @@ -369,6 +369,9 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict) case CPU_INFO_ARCH_TRICORE: monitor_printf(mon, " PC=0x%016" PRIx64, cpu->value->u.tricore.PC); break; + case CPU_INFO_ARCH_ARM: + monitor_printf(mon, " pc=0x%016" PRIx64, cpu->value->u.arm.pc); + break; default: break; } diff --git a/qapi-schema.json b/qapi-schema.json index e9a6364b7d..650e98c950 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -1277,7 +1277,7 @@ # Since: 2.6 ## { 'enum': 'CpuInfoArch', - 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] } + 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'arm', 'other' ] } ## # @CpuInfo: @@ -1312,6 +1312,7 @@ 'ppc': 'CpuInfoPPC', 'mips': 'CpuInfoMIPS', 'tricore': 'CpuInfoTricore', + 'arm': 'CpuInfoARM', 'other': 'CpuInfoOther' } } ## @@ -1372,6 +1373,17 @@ { 'struct': 'CpuInfoTricore', 'data': { 'PC': 'int' } } ## +# @CpuInfoARM: +# +# Additional information about a virtual ARM CPU +# +# @pc: the instruction pointer +# +# Since: 2.9 +## +{ 'struct': 'CpuInfoARM', 'data': { 'pc': 'int' } } + +## # @CpuInfoOther: # # No additional information is available about the virtual CPU
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- cpus.c | 6 ++++++ hmp.c | 3 +++ qapi-schema.json | 14 +++++++++++++- 3 files changed, 22 insertions(+), 1 deletion(-) -- 2.11.0