From patchwork Sun Mar 12 23:28:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 95190 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp952650qgd; Sun, 12 Mar 2017 16:28:40 -0700 (PDT) X-Received: by 10.99.96.9 with SMTP id u9mr32372464pgb.159.1489361320500; Sun, 12 Mar 2017 16:28:40 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e3si16421668plb.171.2017.03.12.16.28.40; Sun, 12 Mar 2017 16:28:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935518AbdCLX2k (ORCPT + 4 others); Sun, 12 Mar 2017 19:28:40 -0400 Received: from mail-lf0-f47.google.com ([209.85.215.47]:35820 "EHLO mail-lf0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935487AbdCLX2j (ORCPT ); Sun, 12 Mar 2017 19:28:39 -0400 Received: by mail-lf0-f47.google.com with SMTP id j90so57567634lfk.2 for ; Sun, 12 Mar 2017 16:28:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vUaqyTShb35fNF+zyQFHaHUv4SgR7ttKN7HduJQ2XC4=; b=MSj77DkjeN5K1KHb6GMsa/DZ2XTM/vQ+aUF/q84QCTAcb+DDSbOi2Oy5R/W9BO6DRe RaMSWOvkGnet8KrcHMAwlwrhYpsAsPjarw6vlt+kjW0WiwPLQHELzSkZyYLe15ij5jIn Jfh5ZCGQY1vX0oRmgn4LZGhILZcOxpPrmzMsM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vUaqyTShb35fNF+zyQFHaHUv4SgR7ttKN7HduJQ2XC4=; b=qcY0IijZMiyMwFR3TV/2x6r5TBPR1NlwoXZTsqK3IQM3uYh0i+n2QIZbQiR0T0t03t mnoObpXqToKqGgAZgCqu6eRY8mZYcq/ApTCnOmHcfPwIlgCU5IUvJtasAgXD9gmoi0QU 0fIrdAUGeYrgLpGn7yakLZjvoffS7qAhPxfeCllyFi86DmIuTbADNsQaKIzf2KbNCbKP YpHa/0HW3TFlXlbcP6CXnYMog+SxJteC5H0A7I0/P4V9fubQLw3dZe18BqV73bsFyMpy njHCwTbmc8cZuU0egpmVXQiCrzqvAg57vXhEezxal8XhIoNlgQw9Lm53LcEDsgdjT/CN QyVA== X-Gm-Message-State: AMke39mVOkFrke7Wa8WvdjRfTDGgVVYIK3XSWQwkfPMJrDVkuxkK6WYlQoD5C093iyD7GcBb X-Received: by 10.46.14.1 with SMTP id 1mr9345063ljo.60.1489361317377; Sun, 12 Mar 2017 16:28:37 -0700 (PDT) Received: from localhost.localdomain (c-357171d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.113.53]) by smtp.gmail.com with ESMTPSA id l137sm1811955lfb.64.2017.03.12.16.28.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 12 Mar 2017 16:28:36 -0700 (PDT) From: Linus Walleij To: Hans Ulli Kroll , Florian Fainelli , Jonas Jensen , Alexandre Courbot Cc: Janos Laube , Paulius Zaleckas , openwrt-devel@openwrt.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, Linus Walleij Subject: [PATCH 4/6] gpio: gemini: rename to match Faraday IP Date: Mon, 13 Mar 2017 00:28:16 +0100 Message-Id: <20170312232818.26304-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170312232818.26304-1-linus.walleij@linaro.org> References: <20170312232818.26304-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Gemini driver is actually a driver for the Faraday Technology FTGPIO010 IP block. We rename the driver and the Kconfig symbol and put in a a new compatible string for the Moxa ART SoC that is also using this IP block. Cc: Jonas Jensen Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 7 ++- drivers/gpio/Makefile | 2 +- drivers/gpio/{gpio-gemini.c => gpio-ftgpio010.c} | 72 +++++++++++++----------- 3 files changed, 44 insertions(+), 37 deletions(-) rename drivers/gpio/{gpio-gemini.c => gpio-ftgpio010.c} (73%) -- 2.9.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Tested-by: Jonas Jensen diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 05043071fc98..82ba825c224a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -204,14 +204,15 @@ config GPIO_GE_FPGA and write pin state) for GPIO implemented in a number of GE single board computers. -config GPIO_GEMINI - bool "Gemini GPIO" +config GPIO_FTGPIO010 + bool "Faraday FTGPIO010 GPIO" depends on ARCH_GEMINI depends on OF_GPIO select GPIO_GENERIC select GPIOLIB_IRQCHIP help - Support for common GPIOs found in Cortina systems Gemini platforms. + Support for common GPIOs from the Faraday FTGPIO010 IP core, found in + Cortina systems Gemini platforms, Moxa ART and others. config GPIO_GENERIC_PLATFORM tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index becb96c724fe..4b904fec8273 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -48,8 +48,8 @@ obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o +obj-$(CONFIG_GPIO_FTGPIO010) += gpio-ftgpio010.o obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o -obj-$(CONFIG_GPIO_GEMINI) += gpio-gemini.o obj-$(CONFIG_GPIO_GPIO_MM) += gpio-gpio-mm.o obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o obj-$(CONFIG_HTC_EGPIO) += gpio-htc-egpio.o diff --git a/drivers/gpio/gpio-gemini.c b/drivers/gpio/gpio-ftgpio010.c similarity index 73% rename from drivers/gpio/gpio-gemini.c rename to drivers/gpio/gpio-ftgpio010.c index 962485163b7f..e9386f8b67f5 100644 --- a/drivers/gpio/gpio-gemini.c +++ b/drivers/gpio/gpio-ftgpio010.c @@ -1,5 +1,5 @@ /* - * Gemini gpiochip and interrupt routines + * Faraday Technolog FTGPIO010 gpiochip and interrupt routines * Copyright (C) 2017 Linus Walleij * * Based on arch/arm/mach-gemini/gpio.c: @@ -35,28 +35,28 @@ #define GPIO_DEBOUNCE_PRESCALE 0x44 /** - * struct gemini_gpio - Gemini GPIO state container + * struct ftgpio_gpio - Gemini GPIO state container * @dev: containing device for this instance * @gc: gpiochip for this instance */ -struct gemini_gpio { +struct ftgpio_gpio { struct device *dev; struct gpio_chip gc; void __iomem *base; }; -static void gemini_gpio_ack_irq(struct irq_data *d) +static void ftgpio_gpio_ack_irq(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct gemini_gpio *g = gpiochip_get_data(gc); + struct ftgpio_gpio *g = gpiochip_get_data(gc); writel(BIT(irqd_to_hwirq(d)), g->base + GPIO_INT_CLR); } -static void gemini_gpio_mask_irq(struct irq_data *d) +static void ftgpio_gpio_mask_irq(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct gemini_gpio *g = gpiochip_get_data(gc); + struct ftgpio_gpio *g = gpiochip_get_data(gc); u32 val; val = readl(g->base + GPIO_INT_EN); @@ -64,10 +64,10 @@ static void gemini_gpio_mask_irq(struct irq_data *d) writel(val, g->base + GPIO_INT_EN); } -static void gemini_gpio_unmask_irq(struct irq_data *d) +static void ftgpio_gpio_unmask_irq(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct gemini_gpio *g = gpiochip_get_data(gc); + struct ftgpio_gpio *g = gpiochip_get_data(gc); u32 val; val = readl(g->base + GPIO_INT_EN); @@ -75,10 +75,10 @@ static void gemini_gpio_unmask_irq(struct irq_data *d) writel(val, g->base + GPIO_INT_EN); } -static int gemini_gpio_set_irq_type(struct irq_data *d, unsigned int type) +static int ftgpio_gpio_set_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct gemini_gpio *g = gpiochip_get_data(gc); + struct ftgpio_gpio *g = gpiochip_get_data(gc); u32 mask = BIT(irqd_to_hwirq(d)); u32 reg_both, reg_level, reg_type; @@ -123,23 +123,23 @@ static int gemini_gpio_set_irq_type(struct irq_data *d, unsigned int type) writel(reg_level, g->base + GPIO_INT_LEVEL); writel(reg_both, g->base + GPIO_INT_BOTH_EDGE); - gemini_gpio_ack_irq(d); + ftgpio_gpio_ack_irq(d); return 0; } -static struct irq_chip gemini_gpio_irqchip = { - .name = "GPIO", - .irq_ack = gemini_gpio_ack_irq, - .irq_mask = gemini_gpio_mask_irq, - .irq_unmask = gemini_gpio_unmask_irq, - .irq_set_type = gemini_gpio_set_irq_type, +static struct irq_chip ftgpio_gpio_irqchip = { + .name = "FTGPIO010", + .irq_ack = ftgpio_gpio_ack_irq, + .irq_mask = ftgpio_gpio_mask_irq, + .irq_unmask = ftgpio_gpio_unmask_irq, + .irq_set_type = ftgpio_gpio_set_irq_type, }; -static void gemini_gpio_irq_handler(struct irq_desc *desc) +static void ftgpio_gpio_irq_handler(struct irq_desc *desc) { struct gpio_chip *gc = irq_desc_get_handler_data(desc); - struct gemini_gpio *g = gpiochip_get_data(gc); + struct ftgpio_gpio *g = gpiochip_get_data(gc); struct irq_chip *irqchip = irq_desc_get_chip(desc); int offset; unsigned long stat; @@ -155,11 +155,11 @@ static void gemini_gpio_irq_handler(struct irq_desc *desc) chained_irq_exit(irqchip, desc); } -static int gemini_gpio_probe(struct platform_device *pdev) +static int ftgpio_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; - struct gemini_gpio *g; + struct ftgpio_gpio *g; int irq; int ret; @@ -189,7 +189,7 @@ static int gemini_gpio_probe(struct platform_device *pdev) dev_err(dev, "unable to init generic GPIO\n"); return ret; } - g->gc.label = "Gemini"; + g->gc.label = "FTGPIO010"; g->gc.base = -1; g->gc.parent = dev; g->gc.owner = THIS_MODULE; @@ -204,33 +204,39 @@ static int gemini_gpio_probe(struct platform_device *pdev) writel(0x0, g->base + GPIO_INT_MASK); writel(~0x0, g->base + GPIO_INT_CLR); - ret = gpiochip_irqchip_add(&g->gc, &gemini_gpio_irqchip, + ret = gpiochip_irqchip_add(&g->gc, &ftgpio_gpio_irqchip, 0, handle_bad_irq, IRQ_TYPE_NONE); if (ret) { dev_info(dev, "could not add irqchip\n"); return ret; } - gpiochip_set_chained_irqchip(&g->gc, &gemini_gpio_irqchip, - irq, gemini_gpio_irq_handler); + gpiochip_set_chained_irqchip(&g->gc, &ftgpio_gpio_irqchip, + irq, ftgpio_gpio_irq_handler); - dev_info(dev, "Gemini GPIO @%p registered\n", g->base); + dev_info(dev, "FTGPIO010 @%p registered\n", g->base); return 0; } -static const struct of_device_id gemini_gpio_of_match[] = { +static const struct of_device_id ftgpio_gpio_of_match[] = { { .compatible = "cortina,gemini-gpio", }, + { + .compatible = "moxa,moxart-gpio", + }, + { + .compatible = "faraday,ftgpio010", + }, {}, }; -static struct platform_driver gemini_gpio_driver = { +static struct platform_driver ftgpio_gpio_driver = { .driver = { - .name = "gemini-gpio", - .of_match_table = of_match_ptr(gemini_gpio_of_match), + .name = "ftgpio010-gpio", + .of_match_table = of_match_ptr(ftgpio_gpio_of_match), }, - .probe = gemini_gpio_probe, + .probe = ftgpio_gpio_probe, }; -builtin_platform_driver(gemini_gpio_driver); +builtin_platform_driver(ftgpio_gpio_driver);