[1/4] drm: zte: do not enable clock auto-gating by default

Message ID 1490098556-23853-2-git-send-email-shawnguo@kernel.org
State New
Headers show
Series
  • Add ZTE VGA driver support
Related show

Commit Message

Shawn Guo March 21, 2017, 12:15 p.m.
From: Shawn Guo <shawn.guo@linaro.org>

Some VOU modules do not work well with clock auto-gating.  For example,
VGA I2C bus will fail to read EDID data from monitor.  Let's not enable
this feature by default, and leave it to the possible future low-power
optimization.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/gpu/drm/zte/zx_vou.c | 3 ---
 1 file changed, 3 deletions(-)

Comments

Sean Paul April 4, 2017, 5:48 p.m. | #1
On Tue, Mar 21, 2017 at 08:15:53PM +0800, Shawn Guo wrote:
> From: Shawn Guo <shawn.guo@linaro.org>
> 
> Some VOU modules do not work well with clock auto-gating.  For example,
> VGA I2C bus will fail to read EDID data from monitor.  Let's not enable
> this feature by default, and leave it to the possible future low-power
> optimization.
> 

Reviewed-by: Sean Paul <seanpaul@chromium.org>

> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  drivers/gpu/drm/zte/zx_vou.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/zte/zx_vou.c b/drivers/gpu/drm/zte/zx_vou.c
> index cf92d675feaa..2a2d90bd9425 100644
> --- a/drivers/gpu/drm/zte/zx_vou.c
> +++ b/drivers/gpu/drm/zte/zx_vou.c
> @@ -720,9 +720,6 @@ static void vou_hw_init(struct zx_vou_hw *vou)
>  	/* Release reset for all VOU modules */
>  	zx_writel(vou->vouctl + VOU_SOFT_RST, ~0);
>  
> -	/* Enable clock auto-gating for all VOU modules */
> -	zx_writel(vou->vouctl + VOU_CLK_REQEN, ~0);
> -
>  	/* Enable all VOU module clocks */
>  	zx_writel(vou->vouctl + VOU_CLK_EN, ~0);
>  
> -- 
> 1.9.1

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diff --git a/drivers/gpu/drm/zte/zx_vou.c b/drivers/gpu/drm/zte/zx_vou.c
index cf92d675feaa..2a2d90bd9425 100644
--- a/drivers/gpu/drm/zte/zx_vou.c
+++ b/drivers/gpu/drm/zte/zx_vou.c
@@ -720,9 +720,6 @@  static void vou_hw_init(struct zx_vou_hw *vou)
 	/* Release reset for all VOU modules */
 	zx_writel(vou->vouctl + VOU_SOFT_RST, ~0);
 
-	/* Enable clock auto-gating for all VOU modules */
-	zx_writel(vou->vouctl + VOU_CLK_REQEN, ~0);
-
 	/* Enable all VOU module clocks */
 	zx_writel(vou->vouctl + VOU_CLK_EN, ~0);