From patchwork Sat Mar 25 16:18:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 95989 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp532200qgd; Sat, 25 Mar 2017 09:19:33 -0700 (PDT) X-Received: by 10.84.230.230 with SMTP id e93mr18482477plk.187.1490458773219; Sat, 25 Mar 2017 09:19:33 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si6723034pli.62.2017.03.25.09.19.33; Sat, 25 Mar 2017 09:19:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751355AbdCYQTd (ORCPT + 5 others); Sat, 25 Mar 2017 12:19:33 -0400 Received: from mail-pf0-f178.google.com ([209.85.192.178]:36621 "EHLO mail-pf0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbdCYQTc (ORCPT ); Sat, 25 Mar 2017 12:19:32 -0400 Received: by mail-pf0-f178.google.com with SMTP id o126so7965708pfb.3 for ; Sat, 25 Mar 2017 09:19:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ap6SFIPRbKON2L/qtwLgwrUxMB5xNoDWf4AlHxHnNkw=; b=d4x42KAQLC4v3LqxjK/g34CE9J9KZoB9olurkwWRpWyK0o9DTOAm/ui+pkmLon3Yus 396kndxaxwT9yfivhibZoaWamVbJJGwjm4bfqjAlXd8aSdPrKz1k6N8BmTTAilPQ35dZ 77mJGc2qMN0iL9fYdNn5H+OGWT6dDIh35gPq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ap6SFIPRbKON2L/qtwLgwrUxMB5xNoDWf4AlHxHnNkw=; b=q074wac1011sl5zc0mFv39h42E1q+PzWJhkP//QxBgSrwxPCNik71UQh4qZDdz3PIS YtVdITICSI+3U1CfclwePCGVSGWr9uFQgWAwd1KNkhiKLzFHnxCbXZWXz8cC2ylDG2Ur X2qAbcEIxsSPhWnDGGD+y/ILfzoWDMUirWHaR8ehG9XgTisld6bacf1DkIo+zmdJ5ZTB MTti1WTkhBw4asY+9ljpDfRZN93j5FiaAU+jLHmIYRgvwCrce3ntIwqIYqBK9jlxW3IE 7JKsA/7qmTqm2MG1NtbFoqkDSL3c0F28y62bPvR5p2YwXzPFSLdBUS8tl5eS8VfCZULB riCg== X-Gm-Message-State: AFeK/H2ECpWjXBTU/A7XPAi9Ec/DwjIx1SxMWl+gJiRJoYk9Q8HiUOtCpG6u7RqfuNqwaAiQ X-Received: by 10.84.135.34 with SMTP id 31mr18798923pli.50.1490458770871; Sat, 25 Mar 2017 09:19:30 -0700 (PDT) Received: from phantom.lan ([106.51.225.38]) by smtp.gmail.com with ESMTPSA id q194sm11469541pfq.43.2017.03.25.09.19.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 25 Mar 2017 09:19:29 -0700 (PDT) From: Sumit Semwal To: stable@vger.kernel.org Cc: Gavin Shan , Bjorn Helgaas , Sasha Levin , Greg Kroah-Hartman , Sumit Semwal Subject: [PATCH for-4.4 12/19] PCI: Do any VF BAR updates before enabling the BARs Date: Sat, 25 Mar 2017 21:48:12 +0530 Message-Id: <1490458699-24484-13-git-send-email-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490458699-24484-1-git-send-email-sumit.semwal@linaro.org> References: <1490458699-24484-1-git-send-email-sumit.semwal@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Gavin Shan [ Upstream commit f40ec3c748c6912f6266c56a7f7992de61b255ed ] Previously we enabled VFs and enable their memory space before calling pcibios_sriov_enable(). But pcibios_sriov_enable() may update the VF BARs: for example, on PPC PowerNV we may change them to manage the association of VFs to PEs. Because 64-bit BARs cannot be updated atomically, it's unsafe to update them while they're enabled. The half-updated state may conflict with other devices in the system. Call pcibios_sriov_enable() before enabling the VFs so any BAR updates happen while the VF BARs are disabled. [bhelgaas: changelog] Tested-by: Carol Soto Signed-off-by: Gavin Shan Signed-off-by: Bjorn Helgaas Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sumit Semwal --- drivers/pci/iov.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index 47c46d0..3575277 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -303,13 +303,6 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) return rc; } - pci_iov_set_numvfs(dev, nr_virtfn); - iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; - pci_cfg_access_lock(dev); - pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); - msleep(100); - pci_cfg_access_unlock(dev); - iov->initial_VFs = initial; if (nr_virtfn < initial) initial = nr_virtfn; @@ -320,6 +313,13 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) goto err_pcibios; } + pci_iov_set_numvfs(dev, nr_virtfn); + iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; + pci_cfg_access_lock(dev); + pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); + msleep(100); + pci_cfg_access_unlock(dev); + for (i = 0; i < initial; i++) { rc = virtfn_add(dev, i, 0); if (rc)