[Linaro-uefi,Linaro-uefi,v2,06/17] Hisilicon/D02: fix IORT test issue in luvOS test

Message ID 1491046162-53797-7-git-send-email-chenhui.sun@linaro.org
State New
Headers show
Series
  • D03/D05 platforms bug fix
Related show

Commit Message

Chenhui Sun April 1, 2017, 11:29 a.m.
Luvos test report:
"FAILED [HIGH] IORTMemAttrInvalid: Test 1, IORT PCI Root Complex Node
Memory Attributes are illegal, CCA cannot be 1 if CPM is 0."

Reference to 《DEN0049B_IO_Remapping_Table》 3.1.1.4
Table13 and Table14:
“Note that if CCA is 0x1, CPM must also be 0x1.
Conversely, If CPM is 0x0 then CCA must be 0x0.”

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Yi Li <phoenix.liyi@huawei.com>
Signed-off-by: Chenhui Sun <chenhui.sun@linaro.com>
---
 Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Graeme Gregory April 4, 2017, 1:47 p.m. | #1
On Sat, Apr 01, 2017 at 07:29:11PM +0800, Chenhui Sun wrote:
> Luvos test report:

> "FAILED [HIGH] IORTMemAttrInvalid: Test 1, IORT PCI Root Complex Node

> Memory Attributes are illegal, CCA cannot be 1 if CPM is 0."

> 

> Reference to 《DEN0049B_IO_Remapping_Table》 3.1.1.4

> Table13 and Table14:

> “Note that if CCA is 0x1, CPM must also be 0x1.

> Conversely, If CPM is 0x0 then CCA must be 0x0.”

> 


Thanks for the change

For Patches 6,7,8

Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>


> Contributed-under: TianoCore Contribution Agreement 1.0

> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>

> Signed-off-by: Yi Li <phoenix.liyi@huawei.com>

> Signed-off-by: Chenhui Sun <chenhui.sun@linaro.com>

> ---

>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 8 ++++----

>  1 file changed, 4 insertions(+), 4 deletions(-)

> 

> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl

> index bcd31d6..8f38359 100644

> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl

> +++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl

> @@ -205,8 +205,8 @@

>                              Read Allocate : 0

>                                   Override : 0

>  [0002]                           Reserved : 0000

> -[0001]       Memory Flags (decoded below) : 00

> -                                Coherency : 0

> +[0001]       Memory Flags (decoded below) : 01

> +                                Coherency : 1

>                           Device Attribute : 0

>  [0004]                      ATS Attribute : 00000000

>  [0004]                 PCI Segment Number : 00000001

> @@ -234,8 +234,8 @@

>                              Read Allocate : 0

>                                   Override : 0

>  [0002]                           Reserved : 0000

> -[0001]       Memory Flags (decoded below) : 00

> -                                Coherency : 0

> +[0001]       Memory Flags (decoded below) : 01

> +                                Coherency : 1

>                           Device Attribute : 0

>  [0004]                      ATS Attribute : 00000000

>  [0004]                 PCI Segment Number : 00000002

> -- 

> 1.9.1

>
Leif Lindholm April 6, 2017, 4:50 p.m. | #2
On Sat, Apr 01, 2017 at 07:29:11PM +0800, Chenhui Sun wrote:
> Luvos test report:
> "FAILED [HIGH] IORTMemAttrInvalid: Test 1, IORT PCI Root Complex Node
> Memory Attributes are illegal, CCA cannot be 1 if CPM is 0."
> 
> Reference to 《DEN0049B_IO_Remapping_Table》 3.1.1.4
> Table13 and Table14:
> “Note that if CCA is 0x1, CPM must also be 0x1.
> Conversely, If CPM is 0x0 then CCA must be 0x0.”
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: Yi Li <phoenix.liyi@huawei.com>
> Signed-off-by: Chenhui Sun <chenhui.sun@linaro.com>

This, and the following two:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Pushed as bb301e7ef8..fd643be501.

/
    Leif

> ---
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
> index bcd31d6..8f38359 100644
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
> +++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
> @@ -205,8 +205,8 @@
>                              Read Allocate : 0
>                                   Override : 0
>  [0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> +[0001]       Memory Flags (decoded below) : 01
> +                                Coherency : 1
>                           Device Attribute : 0
>  [0004]                      ATS Attribute : 00000000
>  [0004]                 PCI Segment Number : 00000001
> @@ -234,8 +234,8 @@
>                              Read Allocate : 0
>                                   Override : 0
>  [0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> +[0001]       Memory Flags (decoded below) : 01
> +                                Coherency : 1
>                           Device Attribute : 0
>  [0004]                      ATS Attribute : 00000000
>  [0004]                 PCI Segment Number : 00000002
> -- 
> 1.9.1
>

Patch hide | download patch | download mbox

diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
index bcd31d6..8f38359 100644
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
+++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl
@@ -205,8 +205,8 @@ 
                             Read Allocate : 0
                                  Override : 0
 [0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
+[0001]       Memory Flags (decoded below) : 01
+                                Coherency : 1
                          Device Attribute : 0
 [0004]                      ATS Attribute : 00000000
 [0004]                 PCI Segment Number : 00000001
@@ -234,8 +234,8 @@ 
                             Read Allocate : 0
                                  Override : 0
 [0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
+[0001]       Memory Flags (decoded below) : 01
+                                Coherency : 1
                          Device Attribute : 0
 [0004]                      ATS Attribute : 00000000
 [0004]                 PCI Segment Number : 00000002