From patchwork Tue Apr 4 06:12:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 96663 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp46767qgd; Mon, 3 Apr 2017 23:12:54 -0700 (PDT) X-Received: by 10.84.197.131 with SMTP id n3mr26352775pld.43.1491286374789; Mon, 03 Apr 2017 23:12:54 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f1si16391190pln.331.2017.04.03.23.12.54; Mon, 03 Apr 2017 23:12:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751031AbdDDGMy (ORCPT + 6 others); Tue, 4 Apr 2017 02:12:54 -0400 Received: from mail-pg0-f46.google.com ([74.125.83.46]:34843 "EHLO mail-pg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750926AbdDDGMx (ORCPT ); Tue, 4 Apr 2017 02:12:53 -0400 Received: by mail-pg0-f46.google.com with SMTP id 81so142591032pgh.2 for ; Mon, 03 Apr 2017 23:12:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cg3yR7bGqv3Lnjpf7dVccuebwulzk+7RQuTL0CiOhJA=; b=G+M/cTOGuwd4/YVjbGAmRIiE9ueILBFl7cH+fartAxaeLMb/9eSzTfo/uVXYmOUd3A eYK22bkX2y/Z5pXUhIoqP9v3YN6u6wDY0RbWafnnEwB0TkjdBSD6IYrkdVpSguxZxMra EQIrAsGXPkOvQrLtpX+046Sx4qcgg8on02VAk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cg3yR7bGqv3Lnjpf7dVccuebwulzk+7RQuTL0CiOhJA=; b=Wvd0ihoIBTzgdPX6OtV3+/0xWdThbQHkLe6CBEbMf0smdJc23Qo4/QRMEHb68fCx89 vnn8DTVY2nxNuDsSpmvq87cMrol62UN+sQJd/FXykW66VxQDjZLrdRLVUGHBk41bvzGn te95kFTehHE8vzJpqA7rGBkDDNsyeFWnnoG0deikAMDsG/AM2IHI7aE7ULl4K9KKlUGd HjHA1G+OxywawOjy7lGJbS99+oniGvpt0t0N30pM6YVVuhtHYTb5Vn3q5Hr5zpzhwCyi n9fWUMTX9jRuYfRtYI/fH9mVdbPFf5YWqmgHng8Kpd73pH9sMRk5i34PhFC3hBBcydKG 990A== X-Gm-Message-State: AFeK/H1toh0+fohSvbHDcI8pDKd2/FqJWKcdTHWGTav4HzFVrK3oAa/DUcsxWiJInS7kqpAY X-Received: by 10.84.208.227 with SMTP id c32mr26768337plj.71.1491286372742; Mon, 03 Apr 2017 23:12:52 -0700 (PDT) Received: from localhost.localdomain ([106.51.240.246]) by smtp.gmail.com with ESMTPSA id p9sm29164025pfe.22.2017.04.03.23.12.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 03 Apr 2017 23:12:52 -0700 (PDT) From: Amit Pundir To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH 01/33] ARM: BCM5301X: Add back handler ignoring external imprecise aborts Date: Tue, 4 Apr 2017 11:42:14 +0530 Message-Id: <1491286366-30720-2-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491286366-30720-1-git-send-email-amit.pundir@linaro.org> References: <1491286366-30720-1-git-send-email-amit.pundir@linaro.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Rafał Miłecki Since early BCM5301X days we got abort handler that was removed by commit 937b12306ea79 ("ARM: BCM5301X: remove workaround imprecise abort fault handler"). It assumed we need to deal only with pending aborts left by the bootloader. Unfortunately this isn't true for BCM5301X. When probing PCI config space (device enumeration) it is expected to have master aborts on the PCI bus. Most bridges don't forward (or they allow disabling it) these errors onto the AXI/AMBA bus but not the Northstar (BCM5301X) one. iProc PCIe controller on Northstar seems to be some older one, without a control register for errors forwarding. It means we need to workaround this at platform level. All newer platforms are not affected by this issue. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli (cherry picked from commit 09f3510fb70a46c8921f2cf4a90dbcae460a6820) Signed-off-by: Amit Pundir --- arch/arm/mach-bcm/bcm_5301x.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 2.7.4 diff --git a/arch/arm/mach-bcm/bcm_5301x.c b/arch/arm/mach-bcm/bcm_5301x.c index c8830a2..fe067f6 100644 --- a/arch/arm/mach-bcm/bcm_5301x.c +++ b/arch/arm/mach-bcm/bcm_5301x.c @@ -9,14 +9,42 @@ #include #include +#include +#include + +#define FSR_EXTERNAL (1 << 12) +#define FSR_READ (0 << 10) +#define FSR_IMPRECISE 0x0406 static const char *const bcm5301x_dt_compat[] __initconst = { "brcm,bcm4708", NULL, }; +static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, + struct pt_regs *regs) +{ + /* + * We want to ignore aborts forwarded from the PCIe bus that are + * expected and shouldn't really be passed by the PCIe controller. + * The biggest disadvantage is the same FSR code may be reported when + * reading non-existing APB register and we shouldn't ignore that. + */ + if (fsr == (FSR_EXTERNAL | FSR_READ | FSR_IMPRECISE)) + return 0; + + return 1; +} + +static void __init bcm5301x_init_early(void) +{ + hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, + "imprecise external abort"); +} + DT_MACHINE_START(BCM5301X, "BCM5301X") .l2c_aux_val = 0, .l2c_aux_mask = ~0, .dt_compat = bcm5301x_dt_compat, + .init_early = bcm5301x_init_early, MACHINE_END