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[209.132.180.67]) by mx.google.com with ESMTP id x89si19952129pff.381.2017.04.05.01.35.37; Wed, 05 Apr 2017 01:35:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754631AbdDEIel (ORCPT + 9 others); Wed, 5 Apr 2017 04:34:41 -0400 Received: from mail-lf0-f42.google.com ([209.85.215.42]:36256 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932203AbdDEIe3 (ORCPT ); Wed, 5 Apr 2017 04:34:29 -0400 Received: by mail-lf0-f42.google.com with SMTP id x137so3371100lff.3 for ; Wed, 05 Apr 2017 01:34:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=PqWl+V+QHeZE8DaFloRBqiHW3jfB0clZcnNvpBUyE8Y=; b=bYkdyE3+vitNUzWgkTDy3OkxrDs5y8dCyOss3hWZ861pOiGBYm4SjB+0vOOW/s3YLk LJPDIy/Ohe54XA6YngxPbHIpKwtYaH1SPcuP7JhYcquxbmp2xy/LInisKKcFWobw7vhx +Ao6IT+3QamEpk3Xme85PLsa5JKjiqmPBvLv4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=PqWl+V+QHeZE8DaFloRBqiHW3jfB0clZcnNvpBUyE8Y=; b=uF2esUmb4R8QMD5wAm06hstxoWGXXJofYk59scZ8UWz3cbWuphJWtuJLzR5kjdP8ks s+LVO5iqrSYLh97rwkjnlPgBWInsywq9B+/eyXN2IOSIQXI33Sj/jlwPnusK6n042yCF TV3rYv78dVnBMleJ0vAC0DA51YmWRriiLERzZlCgpDFqbY9AaUBdYo7A2B1SWcvo51E7 VYu7q4Jt4HYWWk7nXyLc6IXz0ux7vfQjBkYP5WnAHGbBjcQKZEas4ATX5n0Qnsah7JZx Yb6Huf4sEVY+zmp2xqp5YLFU4YpEsWo13QIgo29aU1ojgvr7faU5FtJNM2mKVt2PKkuY NRJA== X-Gm-Message-State: AFeK/H2KGcA+/BR0Em3DdcSKenpCEQUOOAyS5CEXblVJxGynNUjbfXNdthAO/bKYgcq3O0Yx X-Received: by 10.25.196.68 with SMTP id u65mr8777816lff.50.1491381267568; Wed, 05 Apr 2017 01:34:27 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id g70sm3551876lfg.3.2017.04.05.01.34.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Apr 2017 01:34:26 -0700 (PDT) From: Linus Walleij To: Liam Girdwood , Mark Brown Cc: alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Stephen Boyd , Neil Armstrong , Linus Walleij Subject: [PATCH] ASoC: qcom: move clock names into LPASS variant struct Date: Wed, 5 Apr 2017 10:34:10 +0200 Message-Id: <20170405083410.5999-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The clock names for the two supported codecs are either "mi2s-*" name variants generated by code. This naming scheme does not work for platforms like MSM8660 which has I2S channels named CODEC_I2S_SPKR (rather than just "MI2S tertiary" and other repetitive names) and consequently have clocks named "codec-i2s-spkr-osr-clk" and similar. Skip the runtime generation of clock names and replace it with name lookup tables encoded into the variant data. Signed-off-by: Linus Walleij --- sound/soc/qcom/lpass-apq8016.c | 12 ++++++++++++ sound/soc/qcom/lpass-cpu.c | 22 +++++++--------------- sound/soc/qcom/lpass-ipq806x.c | 6 ++++++ sound/soc/qcom/lpass.h | 2 ++ 4 files changed, 27 insertions(+), 15 deletions(-) -- 2.9.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c index 8aed72be3224..8a74844d99e2 100644 --- a/sound/soc/qcom/lpass-apq8016.c +++ b/sound/soc/qcom/lpass-apq8016.c @@ -231,6 +231,18 @@ static struct lpass_variant apq8016_data = { .wrdma_channels = 2, .dai_driver = apq8016_lpass_cpu_dai_driver, .num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver), + .dai_osr_clk_names = (const char *[]) { + "mi2s-osr-clk0", + "mi2s-osr-clk1", + "mi2s-osr-clk2", + "mi2s-osr-clk3", + }, + .dai_bit_clk_names = (const char *[]) { + "mi2s-bit-clk0", + "mi2s-bit-clk1", + "mi2s-bit-clk2", + "mi2s-bit-clk3", + }, .init = apq8016_lpass_init, .exit = apq8016_lpass_exit, .alloc_dma_channel = apq8016_lpass_alloc_dma_channel, diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index 5202a584e0c6..292b103abada 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -429,7 +429,6 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) struct lpass_variant *variant; struct device *dev = &pdev->dev; const struct of_device_id *match; - char clk_name[16]; int ret, i, dai_id; dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0); @@ -477,31 +476,24 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) for (i = 0; i < variant->num_dai; i++) { dai_id = variant->dai_driver[i].id; - if (variant->num_dai > 1) - sprintf(clk_name, "mi2s-osr-clk%d", i); - else - sprintf(clk_name, "mi2s-osr-clk"); - drvdata->mi2s_osr_clk[dai_id] = devm_clk_get(&pdev->dev, - clk_name); + variant->dai_osr_clk_names[i]); if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) { dev_warn(&pdev->dev, - "error getting optional mi2s-osr-clk: %ld\n", + "%s() error getting optional %s: %ld\n", + __func__, + variant->dai_osr_clk_names[i], PTR_ERR(drvdata->mi2s_osr_clk[dai_id])); drvdata->mi2s_osr_clk[dai_id] = NULL; } - if (variant->num_dai > 1) - sprintf(clk_name, "mi2s-bit-clk%d", i); - else - sprintf(clk_name, "mi2s-bit-clk"); - drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(&pdev->dev, - clk_name); + variant->dai_bit_clk_names[i]); if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { dev_err(&pdev->dev, - "error getting mi2s-bit-clk: %ld\n", + "error getting %s: %ld\n", + variant->dai_bit_clk_names[i], PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); } diff --git a/sound/soc/qcom/lpass-ipq806x.c b/sound/soc/qcom/lpass-ipq806x.c index 608c1a92af8a..ca1e1f2d2787 100644 --- a/sound/soc/qcom/lpass-ipq806x.c +++ b/sound/soc/qcom/lpass-ipq806x.c @@ -92,6 +92,12 @@ static struct lpass_variant ipq806x_data = { .wrdma_channels = 4, .dai_driver = &ipq806x_lpass_cpu_dai_driver, .num_dai = 1, + .dai_osr_clk_names = (const char *[]) { + "mi2s-osr-clk", + }, + .dai_bit_clk_names = (const char *[]) { + "mi2s-bit-clk", + }, .alloc_dma_channel = ipq806x_lpass_alloc_dma_channel, .free_dma_channel = ipq806x_lpass_free_dma_channel, }; diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h index 9b031352ea3c..b848db2d6c3d 100644 --- a/sound/soc/qcom/lpass.h +++ b/sound/soc/qcom/lpass.h @@ -91,6 +91,8 @@ struct lpass_variant { /* SOC specific dais */ struct snd_soc_dai_driver *dai_driver; int num_dai; + const char * const *dai_osr_clk_names; + const char * const *dai_bit_clk_names; }; /* register the platform driver from the CPU DAI driver */