From patchwork Wed Apr 5 10:32:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 96813 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp196037qgd; Wed, 5 Apr 2017 03:33:31 -0700 (PDT) X-Received: by 10.98.76.140 with SMTP id e12mr27879497pfj.82.1491388411078; Wed, 05 Apr 2017 03:33:31 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f16si20271056pli.143.2017.04.05.03.33.30; Wed, 05 Apr 2017 03:33:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933464AbdDEKd3 (ORCPT + 6 others); Wed, 5 Apr 2017 06:33:29 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:36799 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933410AbdDEKdZ (ORCPT ); Wed, 5 Apr 2017 06:33:25 -0400 Received: by mail-pf0-f173.google.com with SMTP id o126so5584493pfb.3 for ; Wed, 05 Apr 2017 03:32:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Y8zOukan2JejQjnNm7LJz+LbfC8C/DLn0s86i/CVMzM=; b=jXtWuysTCKh+oegsqymPUDViLxwgHUjezHAGUm2+LYaiSqsgNSGsoIMx3Cg6Pua4Tz 73aURDrtwICIl7MrEAdCpzfxR2f6U4OV9UGSUooCdQ4qdrl70/xcleoPtaB+u6hB+/nu yiGja9Vp4hG8Y8NaS6nNOjGbPNtL+2LM5Xlps= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Y8zOukan2JejQjnNm7LJz+LbfC8C/DLn0s86i/CVMzM=; b=bGfkKFCmLOcAlCD2haphBRhByMIEMnbc4u7LFle+0QfFAjTqnVOfgpDApDlDuKnse9 30zMK6gUnwZJkYKwXnlnvEaU0J4Eks6vikdHkjSfcSscJDSeA5Ahkb9jCHaiZyN4+Fhu J3mRhNcDQuDxLQtyKpJBriC6S3LomDU4AqXB6bkYZDmohnVU+095F04EOZzQF2x/Nkko oP1uL027bBv0nuVLJPgxRZJc4T7vPWp7dIAg/SQrZFyBHQ+FVT4ot/OT1IMp1abti1rK VPU4XKs47Yz1aYDcO073v7C6EdoiVO+goAW2TbPssWshAUi8enSY1zFGTu/M3b2ffaOf gAUg== X-Gm-Message-State: AFeK/H0KCVoEJEZpXcXcLpE0GkPrspLb0IWPsFiEk6+WvBjmwvo+rjqHAiSZhPD+O0nolgC7 X-Received: by 10.84.218.130 with SMTP id r2mr34928668pli.79.1491388369264; Wed, 05 Apr 2017 03:32:49 -0700 (PDT) Received: from localhost.localdomain ([106.51.240.246]) by smtp.gmail.com with ESMTPSA id a62sm36732075pgc.60.2017.04.05.03.32.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 05 Apr 2017 03:32:48 -0700 (PDT) From: Amit Pundir To: stable@vger.kernel.org Cc: gregkh@linuxfoundation.org, Boris Brezillon , Stephen Boyd Subject: [PATCH v2 for-4.9 10/32] clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock Date: Wed, 5 Apr 2017 16:02:02 +0530 Message-Id: <1491388344-13521-11-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491388344-13521-1-git-send-email-amit.pundir@linaro.org> References: <1491388344-13521-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Boris Brezillon The VEC clock requires needs to be set at exactly 108MHz. Allow rate change propagation on PLLH_AUX to match this requirement wihtout impacting other IPs (PLLH is currently only used by the HDMI encoder, which cannot be enabled when the VEC encoder is enabled). Signed-off-by: Boris Brezillon Reviewed-by: Eric Anholt Signed-off-by: Stephen Boyd (cherry picked from commit d86d46af84855403c00018be1c3e7bc190f2a6cd) Signed-off-by: Amit Pundir --- drivers/clk/bcm/clk-bcm2835.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index df96fe6..eaf82f4 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -1861,7 +1861,12 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .ctl_reg = CM_VECCTL, .div_reg = CM_VECDIV, .int_bits = 4, - .frac_bits = 0), + .frac_bits = 0, + /* + * Allow rate change propagation only on PLLH_AUX which is + * assigned index 7 in the parent array. + */ + .set_rate_parent = BIT(7)), /* dsi clocks */ [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(