[2/2] arm64: dts: hi6220: add acpu_sctrl

Message ID 1492478242-16146-2-git-send-email-zhangfei.gao@linaro.org
State Superseded
Headers show
Series
  • [1/2] clk: hi6220: add acpu clock
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Commit Message

zhangfei April 18, 2017, 1:17 a.m.
Add acpu_sctrl clock node

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>

Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>

---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

-- 
2.7.4

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Comments

Wei Xu June 15, 2017, 3:46 p.m. | #1
Hi Zhangfei,

On 2017/4/18 2:17, Zhangfei Gao wrote:
> Add acpu_sctrl clock node

> 

> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>

> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>


Fine to me. Thanks!
Acked-by: Wei Xu <xuwei5@hisilicon.com>


BR,
Wei

> ---

>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++

>  1 file changed, 6 insertions(+)

> 

> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi

> index 470461d..710cc34 100644

> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi

> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi

> @@ -262,6 +262,12 @@

>  			#clock-cells = <1>;

>  		};

>  

> +		acpu_sctrl: acpu_sctrl@f7032000 {

> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";

> +			reg = <0x0 0xf6504000 0x0 0x1000>;

> +			#clock-cells = <1>;

> +		};

> +

>  		medianoc_ade: medianoc_ade@f4520000 {

>  			compatible = "syscon";

>  			reg = <0x0 0xf4520000 0x0 0x4000>;

> 


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Patch hide | download patch | download mbox

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 470461d..710cc34 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -262,6 +262,12 @@ 
 			#clock-cells = <1>;
 		};
 
+		acpu_sctrl: acpu_sctrl@f7032000 {
+			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
+			reg = <0x0 0xf6504000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		medianoc_ade: medianoc_ade@f4520000 {
 			compatible = "syscon";
 			reg = <0x0 0xf4520000 0x0 0x4000>;