From patchwork Wed Apr 26 10:57:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 98240 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp261578qgf; Wed, 26 Apr 2017 03:58:34 -0700 (PDT) X-Received: by 10.84.131.1 with SMTP id 1mr42268388pld.40.1493204314049; Wed, 26 Apr 2017 03:58:34 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w20si25075278pgj.196.2017.04.26.03.58.33; Wed, 26 Apr 2017 03:58:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2998895AbdDZK6M (ORCPT + 7 others); Wed, 26 Apr 2017 06:58:12 -0400 Received: from mail-pf0-f169.google.com ([209.85.192.169]:33508 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2998876AbdDZK51 (ORCPT ); Wed, 26 Apr 2017 06:57:27 -0400 Received: by mail-pf0-f169.google.com with SMTP id a188so40690176pfa.0 for ; Wed, 26 Apr 2017 03:57:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=4auqnbtD7FxfxzF9MpcA8KnQmeKCj5LBK6kHUhWTBQA=; b=cpJvL1FZ35LiZn89szpsgaFnob9CEUiQJXFKhDyAN02AjLJLuvH2yHglNTlgyRtXfq vbC3LJfY0T8w+eVbFebtrWxVcSK3VCDhHDtwvPfRM4qn87w08YhQA7WnmeNoSkO/La7e LK1YfJlOI6jEHDZJARn1fAMlLbtTRhSp3hmq0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=4auqnbtD7FxfxzF9MpcA8KnQmeKCj5LBK6kHUhWTBQA=; b=oKpj1JkU4Wyue2CsAmTHDcJyIJgnXUZMRl4hbgZz5Rnu5Qw5qxFSlxP/Hcf289ktWs Ad++nerh0ZLK6aM1riHG7wHvqApdysZ8N+OkNKjRdiQnGKUfJJAs6SIFpnb8leH5AD4t WiABfhBMdkAwx5gYQsYUAfkdy74ooDPLkhrv4LcQtJIOWe1D9tNT5hpie/QCdSk1qf1R jwltqZpyRaskRAmA0J12T+yxefjb3+6TsN+Y5yl/Vsf+Fem3X8M11ZLfmvnk4vRJUbSr LOB1fNGjh4T6BBqeR1Wa+OHnY52UncqEreBKOz/lMClAGnmQzcPcMxdITiVLzMnFHLXN DKlg== X-Gm-Message-State: AN3rC/5M6yRz0R1dePGZ4dKegVFelB7j/9VN5hSl30hbXIC93aEVA/VA PWIOX2tAnKA1JSAM X-Received: by 10.84.217.215 with SMTP id d23mr42391991plj.59.1493204246782; Wed, 26 Apr 2017 03:57:26 -0700 (PDT) Received: from localhost ([122.172.121.5]) by smtp.gmail.com with ESMTPSA id 186sm24182230pfd.26.2017.04.26.03.57.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Apr 2017 03:57:26 -0700 (PDT) From: Viresh Kumar To: Rafael Wysocki , ulf.hansson@linaro.org, Kevin Hilman , Viresh Kumar , Nishanth Menon , Stephen Boyd Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Vincent Guittot , robh+dt@kernel.org, lina.iyer@linaro.org, rnayak@codeaurora.org, sudeep.holla@arm.com, Viresh Kumar , devicetree@vger.kernel.org Subject: [PATCH V6 1/9] PM / OPP: Introduce "power-domain-opp" property Date: Wed, 26 Apr 2017 16:27:05 +0530 Message-Id: <025acedb263eaa6089d354d9630214ada8013990.1493203884.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.12.0.432.g71c3a4f4ba37 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Power-domains need to express their active states in DT and the devices within the power-domain need to express their dependency on those active states. The power-domains can use the OPP tables without any modifications to the bindings. Add a new property "power-domain-opp", which will contain phandle to the OPP node of the parent power domain. This is required for devices which have dependency on the configured active state of the power domain for their working. For some platforms the actual frequency and voltages of the power domains are managed by the firmware and are so hidden from the high level operating system. The "opp-hz" property is relaxed a bit to contain indexes instead of actual frequency values to support such platforms. Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/opp/opp.txt | 74 ++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 1 deletion(-) -- 2.12.0.432.g71c3a4f4ba37 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt index 63725498bd20..6e30cae2a936 100644 --- a/Documentation/devicetree/bindings/opp/opp.txt +++ b/Documentation/devicetree/bindings/opp/opp.txt @@ -77,7 +77,10 @@ This defines voltage-current-frequency combinations along with other related properties. Required properties: -- opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. +- opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. In some + cases the exact frequency in Hz may be hidden from the OS by the firmware and + this field may contain values that represent the frequency in a firmware + dependent way, for example an index of an array in the firmware. Optional properties: - opp-microvolt: voltage in micro Volts. @@ -154,6 +157,13 @@ properties. - status: Marks the node enabled/disabled. +- power-domain-opp: Phandle to the OPP node of the parent power-domain. The + parent power-domain should be configured to the OPP whose node is pointed by + the phandle, in order to configure the device for the OPP node that contains + this property. The order in which the device and power domain should be + configured is implementation defined. The OPP table of a device can set this + property only if the device node contains "power-domains" property. + Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together. / { @@ -528,3 +538,65 @@ Example 5: opp-supported-hw }; }; }; + +Example 7: Power domains with their own OPP tables: +(example: For 1GHz device require domain state 1 and for 1.1 & 1.2 GHz device require state 2) + +/ { + domain_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + /* + * NOTE: Actual frequency is managed by firmware and is hidden + * from HLOS, so we simply use index in the opp-hz field to + * select the OPP. + */ + domain_opp_1: opp-1 { + opp-hz = /bits/ 64 <1>; + opp-microvolt = <975000 970000 985000>; + }; + domain_opp_2: opp-2 { + opp-hz = /bits/ 64 <2>; + opp-microvolt = <1075000 1000000 1085000>; + }; + }; + + foo_domain: power-controller@12340000 { + compatible = "foo,power-controller"; + reg = <0x12340000 0x1000>; + #power-domain-cells = <0>; + operating-points-v2 = <&domain_opp_table>; + } + + cpu0_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + power-domain-opp = <&domain_opp_1>; + }; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + power-domain-opp = <&domain_opp_2>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + power-domain-opp = <&domain_opp_2>; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a9"; + reg = <0>; + clocks = <&clk_controller 0>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + power-domains = <&foo_domain>; + }; + }; +};