[3.16-stable,79/87] arm64: add missing data types in smp_load_acquire/smp_store_release

Message ID 20170505194745.3627137-80-arnd@arndb.de
State New
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Series
  • build warnings and errors
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Commit Message

Arnd Bergmann May 5, 2017, 7:47 p.m.
From: Andre Przywara <andre.przywara@arm.com>


Commit 2427963027aea8d649b69a6956979cc875edfcf3 upstream.

Commit 8053871d0f7f ("smp: Fix smp_call_function_single_async()
locking") introduced a call to smp_load_acquire() with a u16 argument,
but we only cared about u32 and u64 types in that function so far.
This resulted in a compiler warning fortunately, pointing at an
uninitialized use. Due to the implementation structure the compiler
misses that bug in the smp_store_release(), though.
Add the u16 and u8 variants using ldarh/stlrh and ldarb/stlrb,
respectively. Together with the compiletime_assert_atomic_type() check
this should cover all cases now.

Acked-by: Will Deacon <will.deacon@arm.com>

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Signed-off-by: Will Deacon <will.deacon@arm.com>

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

---
 arch/arm64/include/asm/barrier.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

-- 
2.9.0

Comments

Ben Hutchings Nov. 6, 2017, 6:56 p.m. | #1
On Fri, 2017-05-05 at 21:47 +0200, Arnd Bergmann wrote:
> From: Andre Przywara <andre.przywara@arm.com>

> 

> Commit 2427963027aea8d649b69a6956979cc875edfcf3 upstream.

> 

> Commit 8053871d0f7f ("smp: Fix smp_call_function_single_async()

> locking") introduced a call to smp_load_acquire() with a u16 argument,


But the other commit hasn't been backported to 3.16.  Should it be?  Or
is there some other reason we need this one?

Ben.

> but we only cared about u32 and u64 types in that function so far.

> This resulted in a compiler warning fortunately, pointing at an

> uninitialized use. Due to the implementation structure the compiler

> misses that bug in the smp_store_release(), though.

> Add the u16 and u8 variants using ldarh/stlrh and ldarb/stlrb,

> respectively. Together with the compiletime_assert_atomic_type() check

> this should cover all cases now.

>

> Acked-by: Will Deacon <will.deacon@arm.com>

> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

> Signed-off-by: Will Deacon <will.deacon@arm.com>

> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

> ---

>  arch/arm64/include/asm/barrier.h | 16 ++++++++++++++++

>  1 file changed, 16 insertions(+)

> 

> diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h

> index 6389d60574d9..45548e19c673 100644

> --- a/arch/arm64/include/asm/barrier.h

> +++ b/arch/arm64/include/asm/barrier.h

> @@ -62,6 +62,14 @@ do {									\

>  do {									\

>  	compiletime_assert_atomic_type(*p);				\

>  	switch (sizeof(*p)) {						\

> +	case 1:								\

> +		asm volatile ("stlrb %w1, %0"				\

> +				: "=Q" (*p) : "r" (v) : "memory");	\

> +		break;							\

> +	case 2:								\

> +		asm volatile ("stlrh %w1, %0"				\

> +				: "=Q" (*p) : "r" (v) : "memory");	\

> +		break;							\

>  	case 4:								\

>  		asm volatile ("stlr %w1, %0"				\

>  				: "=Q" (*p) : "r" (v) : "memory");	\

> @@ -78,6 +86,14 @@ do {									\

>  	typeof(*p) ___p1;						\

>  	compiletime_assert_atomic_type(*p);				\

>  	switch (sizeof(*p)) {						\

> +	case 1:								\

> +		asm volatile ("ldarb %w0, %1"				\

> +			: "=r" (___p1) : "Q" (*p) : "memory");		\

> +		break;							\

> +	case 2:								\

> +		asm volatile ("ldarh %w0, %1"				\

> +			: "=r" (___p1) : "Q" (*p) : "memory");		\

> +		break;							\

>  	case 4:								\

>  		asm volatile ("ldar %w0, %1"				\

>  			: "=r" (___p1) : "Q" (*p) : "memory");		\


-- 
Ben Hutchings
It is a miracle that curiosity survives formal education. - Albert
Einstein
Arnd Bergmann Nov. 6, 2017, 8:24 p.m. | #2
On Mon, Nov 6, 2017 at 7:56 PM, Ben Hutchings <ben@decadent.org.uk> wrote:
> On Fri, 2017-05-05 at 21:47 +0200, Arnd Bergmann wrote:

>> From: Andre Przywara <andre.przywara@arm.com>

>>

>> Commit 2427963027aea8d649b69a6956979cc875edfcf3 upstream.

>>

>> Commit 8053871d0f7f ("smp: Fix smp_call_function_single_async()

>> locking") introduced a call to smp_load_acquire() with a u16 argument,

>

> But the other commit hasn't been backported to 3.16.  Should it be?  Or

> is there some other reason we need this one?


The 8053871d0f7f  one did not get backported to 3.18. I don't remember
what triggered
this one for the backport list, but it is quite possible that there
was something
else that needed 878a84d5a8a1 too. I also don't know where the
2427963027 number comes from, I see it as
878a84d5a8a18a4ab241d40cebb791d6aedf5605
upstream.

       Arnd

Patch

diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 6389d60574d9..45548e19c673 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -62,6 +62,14 @@  do {									\
 do {									\
 	compiletime_assert_atomic_type(*p);				\
 	switch (sizeof(*p)) {						\
+	case 1:								\
+		asm volatile ("stlrb %w1, %0"				\
+				: "=Q" (*p) : "r" (v) : "memory");	\
+		break;							\
+	case 2:								\
+		asm volatile ("stlrh %w1, %0"				\
+				: "=Q" (*p) : "r" (v) : "memory");	\
+		break;							\
 	case 4:								\
 		asm volatile ("stlr %w1, %0"				\
 				: "=Q" (*p) : "r" (v) : "memory");	\
@@ -78,6 +86,14 @@  do {									\
 	typeof(*p) ___p1;						\
 	compiletime_assert_atomic_type(*p);				\
 	switch (sizeof(*p)) {						\
+	case 1:								\
+		asm volatile ("ldarb %w0, %1"				\
+			: "=r" (___p1) : "Q" (*p) : "memory");		\
+		break;							\
+	case 2:								\
+		asm volatile ("ldarh %w0, %1"				\
+			: "=r" (___p1) : "Q" (*p) : "memory");		\
+		break;							\
 	case 4:								\
 		asm volatile ("ldar %w0, %1"				\
 			: "=r" (___p1) : "Q" (*p) : "memory");		\