From patchwork Mon May 8 16:21:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98837 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407396qge; Mon, 8 May 2017 09:21:27 -0700 (PDT) X-Received: by 10.28.182.70 with SMTP id g67mr7252612wmf.139.1494260487547; Mon, 08 May 2017 09:21:27 -0700 (PDT) Return-Path: Received: from mail-wm0-x22d.google.com (mail-wm0-x22d.google.com. [2a00:1450:400c:c09::22d]) by mx.google.com with ESMTPS id g53si15886310wrg.76.2017.05.08.09.21.27 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 May 2017 09:21:27 -0700 (PDT) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c09::22d as permitted sender) client-ip=2a00:1450:400c:c09::22d; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c09::22d as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-wm0-x22d.google.com with SMTP id b84so60647731wmh.0 for ; Mon, 08 May 2017 09:21:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8OPtFoDnFVfRGNNxJxoOVYOC8Mdmlu53GVINyJ9C/jE=; b=IqHTSsRZOvsN0AsDf34nQ1dOidGAjDv8b+XiR1MGnndzHmqJwy2LlxFD1B3rz3zXtx 5dEJ9gniAKzHUXQ6Zm48l1pg3/Z73nzRavgcwd3lijxkd6wwMK1ZOtIDFNnPyRc50rFO MPKt8wwGY7mSuNAv6x7PQaF0PFKJb9qHsBHWA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8OPtFoDnFVfRGNNxJxoOVYOC8Mdmlu53GVINyJ9C/jE=; b=JfJmyS96kVMMr2Dm1sHk6AASsrF+hOiAC54vGxIfeg4lk9fYR9mM30gYAxd6c95S/i pgEe+EAKnzRlPRtWnAtWnQL1UCLagt54hL9+lx5K0ikupM/WkraVm23yqh9gQHAUxP+5 LoYDcZoeXcGDmY276cwTQ/yAHN6lEAlp/E9GTwe6OvZNaLsuRpzAga5AODBYpFdboDT4 VBpAosg6kwdncokmMJfM7IwXyirEcVTA6cjf3xQ5z8nY1ywrLCsY069wiloaNTmPWBM+ 9haTRwD9JRlPUz7l1OsxLUPXX9XD1uJbneXUOs+6QjMhkrXZvAdl40royihx7fB1aZzQ WlHQ== X-Gm-Message-State: AODbwcBvWPscVjwm/Jn07kmOag2pTO9s4xaqfKudrFOiFqefDcUkIqvz ULgxqrqT6+yuo9KoHO8= X-Received: by 10.25.29.145 with SMTP id d139mr4348550lfd.126.1494260487166; Mon, 08 May 2017 09:21:27 -0700 (PDT) Return-Path: Received: from localhost.localdomain (h-155-4-221-67.na.cust.bahnhof.se. [155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:26 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 3/8] mfd: dts: hi655x: Add clock binding for the pmic Date: Mon, 8 May 2017 18:21:12 +0200 Message-Id: <1494260477-25163-4-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> From: Daniel Lezcano The hi655x PMIC provides the regulators but also a clock. The latter is missing in the definition, so extend the documentation to include this as well. Signed-off-by: Daniel Lezcano Acked-by: Rob Herring Acked-by: Lee Jones [Ulf: Split patch and updated changelog] Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt index 0548569..9630ac0 100644 --- a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -16,6 +16,11 @@ Required properties: - reg: Base address of PMIC on Hi6220 SoC. - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). - pmic-gpios: The GPIO used by PMIC IRQ. +- #clock-cells: From common clock binding; shall be set to 0 + +Optional properties: +- clock-output-names: From common clock binding to override the + default output clock name Example: pmic: pmic@f8000000 { @@ -24,4 +29,5 @@ Example: interrupt-controller; #interrupt-cells = <2>; pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + #clock-cells = <0>; }