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[209.132.180.67]) by mx.google.com with ESMTP id x9si10000094pls.212.2017.05.15.00.50.58; Mon, 15 May 2017 00:50:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759718AbdEOHuw (ORCPT + 10 others); Mon, 15 May 2017 03:50:52 -0400 Received: from mail-wm0-f41.google.com ([74.125.82.41]:35876 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759714AbdEOHuv (ORCPT ); Mon, 15 May 2017 03:50:51 -0400 Received: by mail-wm0-f41.google.com with SMTP id u65so71764064wmu.1 for ; Mon, 15 May 2017 00:50:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=bs+XyCUME+hXXr/K7T8Nt3O0tLnvkG9kB8eBwX9szR8=; b=hmTgUHzBD+v2xKg0VcovQsn/DR3FdV/NxSs4Vt15dpSgkMPeaKzEcOex4QiB5aAhgY pJPqCHppIlE/GDCSadzi8lvMSq+CqNA/HAQyAbjlBT6U1tGOgZXeG2lwt5ss7IdugHID UIjwmcXnJQyyuOnHquXx6TzHB6lA7UNgFdDM0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=bs+XyCUME+hXXr/K7T8Nt3O0tLnvkG9kB8eBwX9szR8=; b=oZymNyAtcAXwO/BkS8BkRf4ldAKYlEc97bZJ47ZR0tL4UN8MEnYQnvvcrv7pZGPzwC ZU4ndn/Xr2JEhcIvIWyy4eHzqgNmjfFyHMuscBpCGnR8UurdZy4s3EVrVh+F8Be3i037 QJsdu1+Gl2abj7PJaIwflVq/0W4vCZssNjxB6RNzLQ2QpOMJFop8k6Y06k/9ykMLOuBy D0DU/lAslgkZBFKgtYvrNt0WPLFth4FjB7WRFR78G8iiQZaBuHjFt/XmCWg177l+uMll XRNiWaGrhuiASWuc6aGlZJ3Jmm8MGbN3jDH1Eoi9Zk4I2hqoyVgz1uO01LDMh6OFkbuJ 1Kxw== X-Gm-Message-State: AODbwcB2mIK1hbYqMoNglTFJPS/bW9QiDGTzl9LGpxBq6ZVTJ7HON9sX 36qqZ3G0c11J1Tj3 X-Received: by 10.25.235.210 with SMTP id f79mr1404650lfk.27.1494834639873; Mon, 15 May 2017 00:50:39 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 31sm2034455lfx.35.2017.05.15.00.50.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 May 2017 00:50:38 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson Cc: Stephen Boyd , Linus Walleij Subject: [PATCH 2/2] ARM: dts: add core I2C devices to the APQ8060 Dragonboard Date: Mon, 15 May 2017 09:50:34 +0200 Message-Id: <20170515075034.3753-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus. Add entries for these to the device tree. The interrupt line from the WM8903 chip is not routed anywhere on this design so it can not be used. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 49 ++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) -- 2.9.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Bjorn Andersson diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 2da1413f5720..32730c4742f6 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -160,6 +160,19 @@ }; }; + dragon_gsbi8_i2c_pins: gsbi8_i2c { + mux { + pins = "gpio64", "gpio65"; + function = "gsbi8"; + }; + pinconf { + pins = "gpio64", "gpio65"; + drive-strength = <16>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; + }; + }; + dragon_gsbi12_i2c_pins: gsbi12_i2c { mux { pins = "gpio115", "gpio116"; @@ -368,6 +381,42 @@ }; }; + gsbi@19800000 { + status = "ok"; + qcom,mode = ; + + i2c@19880000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi8_i2c_pins>; + + eeprom@52 { + /* A 16KiB Platform ID EEPROM on the CPU carrier board */ + compatible = "atmel,24c128"; + reg = <0x52>; + vcc-supply = <&pm8058_s3>; + pagesize = <64>; + }; + wm8903: wm8903@1a { + /* This Woolfson Micro device has an unrouted interrupt line */ + compatible = "wlf,wm8903"; + reg = <0x1a>; + + AVDD-supply = <&pm8058_l16>; + CPVDD-supply = <&pm8058_l16>; + DBVDD-supply = <&pm8058_s3>; + DCVDD-supply = <&pm8058_l0>; + + gpio-controller; + #gpio-cells = <2>; + + micdet-cfg = <0>; + micdet-delay = <100>; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; + }; + }; + }; + gsbi@19c00000 { status = "ok"; qcom,mode = ;