From patchwork Mon Feb 13 15:10:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 93900 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1139901qgi; Mon, 13 Feb 2017 07:12:41 -0800 (PST) X-Received: by 10.200.0.25 with SMTP id a25mr21901649qtg.191.1486998761484; Mon, 13 Feb 2017 07:12:41 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id e30si7418372qta.272.2017.02.13.07.12.41; Mon, 13 Feb 2017 07:12:41 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 1F94F608FA; Mon, 13 Feb 2017 15:12:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id ABD546092A; Mon, 13 Feb 2017 15:11:13 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C81CC60868; Mon, 13 Feb 2017 15:11:08 +0000 (UTC) Received: from mail-ot0-f171.google.com (mail-ot0-f171.google.com [74.125.82.171]) by lists.linaro.org (Postfix) with ESMTPS id 1DD70608FA for ; Mon, 13 Feb 2017 15:10:40 +0000 (UTC) Received: by mail-ot0-f171.google.com with SMTP id 65so69415772otq.2 for ; Mon, 13 Feb 2017 07:10:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mduXYAZ/+siQ8c7WWWU1CjtfTZcMJ6OnPJd3pYYx+JY=; b=j09Iefgm11gkswy91gaVz/S4cZmArqaIXkluCvtxaUHtydUr7hdeuF9FL6bFIGZoop B2kDDdXkNWIW2t6fPEAf4az4jRTW1jWg6Ea0BWCXE1AxlUcUZk+a+6NTP7I/nP4R2Gvv Hjd1AkfbhcpqLOszUgikzCtPBqc5zejOUENtJI40feuB81Zh2rVuBs5U+CreoWbfJOqw Zyc6jHc8ShlA3DxinBhaD/wDmrSFqSrDw/MX1pEU2n9xd8UOmJUZjd3445PHnVoLWxA/ egLCZIiKdmKzl0inUb/i9b1bmlkZ0QexwzdKxhXfGbTvIjFs81/BelSQulVsJpEWysjC znLA== X-Gm-Message-State: AMke39noW+WU423DKyzxxwGaBnkLAJfMxRJs5AhMwSIouQyPaIwAPm124rFSSZBez5wRPQvDNw0= X-Received: by 10.98.89.195 with SMTP id k64mr26263717pfj.126.1486998639511; Mon, 13 Feb 2017 07:10:39 -0800 (PST) Received: from localhost.localdomain ([45.56.159.191]) by smtp.gmail.com with ESMTPSA id z70sm21666857pff.26.2017.02.13.07.10.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 13 Feb 2017 07:10:38 -0800 (PST) From: Haojian Zhuang To: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, linaro-uefi@lists.linaro.org Date: Mon, 13 Feb 2017 23:10:19 +0800 Message-Id: <1486998621-30420-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486998621-30420-1-git-send-email-haojian.zhuang@linaro.org> References: <1486998621-30420-1-git-send-email-haojian.zhuang@linaro.org> Subject: [Linaro-uefi] [PATCH v3 3/5] Platforms/Hisilicon/HiKey: support all GPIO controller X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Enable all PL061 GPIO controllers on HiKey platform. Without this, only one PL061 GPIO controller could be supported on HiKey platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang --- Chips/Hisilicon/Hi6220/Include/Hi6220.h | 22 +++++ .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c | 96 ++++++++++++++++++++++ .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf | 38 +++++++++ 3 files changed, 156 insertions(+) create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c create mode 100644 Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h index 6b87524..5340423 100644 --- a/Chips/Hisilicon/Hi6220/Include/Hi6220.h +++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h @@ -23,6 +23,23 @@ #define HI6220_PERIPH_BASE 0xF4000000 #define HI6220_PERIPH_SZ 0x05800000 +#define GPIO4_CTRL_BASE 0xF7020000 +#define GPIO5_CTRL_BASE 0xF7021000 +#define GPIO6_CTRL_BASE 0xF7022000 +#define GPIO7_CTRL_BASE 0xF7023000 +#define GPIO8_CTRL_BASE 0xF7024000 +#define GPIO9_CTRL_BASE 0xF7025000 +#define GPIO10_CTRL_BASE 0xF7026000 +#define GPIO11_CTRL_BASE 0xF7027000 +#define GPIO12_CTRL_BASE 0xF7028000 +#define GPIO13_CTRL_BASE 0xF7029000 +#define GPIO14_CTRL_BASE 0xF702A000 +#define GPIO15_CTRL_BASE 0xF702B000 +#define GPIO16_CTRL_BASE 0xF702C000 +#define GPIO17_CTRL_BASE 0xF702D000 +#define GPIO18_CTRL_BASE 0xF702E000 +#define GPIO19_CTRL_BASE 0xF702F000 + #define PERI_CTRL_BASE 0xF7030000 #define SC_PERIPH_CTRL4 0x00C #define CTRL4_FPGA_EXT_PHY_SEL BIT3 @@ -102,5 +119,10 @@ #define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) +#define GPIO0_CTRL_BASE 0xF8011000 +#define GPIO1_CTRL_BASE 0xF8012000 +#define GPIO2_CTRL_BASE 0xF8013000 +#define GPIO3_CTRL_BASE 0xF8014000 + #endif /* __HI6220_H__ */ diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c new file mode 100644 index 0000000..52ff299 --- /dev/null +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c @@ -0,0 +1,96 @@ +/** @file +* +* Copyright (c) 2015-2017, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +#include + +#include + +#define GPIO0_CTRL_PIN_BASE 0 +#define GPIO1_CTRL_PIN_BASE (GPIO0_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO2_CTRL_PIN_BASE (GPIO1_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO3_CTRL_PIN_BASE (GPIO2_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO4_CTRL_PIN_BASE (GPIO3_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO5_CTRL_PIN_BASE (GPIO4_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO6_CTRL_PIN_BASE (GPIO5_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO7_CTRL_PIN_BASE (GPIO6_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO8_CTRL_PIN_BASE (GPIO7_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO9_CTRL_PIN_BASE (GPIO8_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO10_CTRL_PIN_BASE (GPIO9_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO11_CTRL_PIN_BASE (GPIO10_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO12_CTRL_PIN_BASE (GPIO11_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO13_CTRL_PIN_BASE (GPIO12_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO14_CTRL_PIN_BASE (GPIO13_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO15_CTRL_PIN_BASE (GPIO14_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO16_CTRL_PIN_BASE (GPIO15_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO17_CTRL_PIN_BASE (GPIO16_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO18_CTRL_PIN_BASE (GPIO17_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO19_CTRL_PIN_BASE (GPIO18_CTRL_PIN_BASE + PL061_GPIO_PINS) + +#define GPIO_PIN_NUMS (GPIO19_CTRL_PIN_BASE + PL061_GPIO_PINS) +#define GPIO_CTRL_NUMS 20 + +GPIO_CONTROLLER gGpioDevice[]= { + { GPIO0_CTRL_BASE, GPIO0_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO1_CTRL_BASE, GPIO1_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO2_CTRL_BASE, GPIO2_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO3_CTRL_BASE, GPIO3_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO4_CTRL_BASE, GPIO4_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO5_CTRL_BASE, GPIO5_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO6_CTRL_BASE, GPIO6_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO7_CTRL_BASE, GPIO7_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO8_CTRL_BASE, GPIO8_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO9_CTRL_BASE, GPIO9_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO10_CTRL_BASE, GPIO10_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO11_CTRL_BASE, GPIO11_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO12_CTRL_BASE, GPIO12_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO13_CTRL_BASE, GPIO13_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO14_CTRL_BASE, GPIO14_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO15_CTRL_BASE, GPIO15_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO16_CTRL_BASE, GPIO16_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO17_CTRL_BASE, GPIO17_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO18_CTRL_BASE, GPIO18_CTRL_PIN_BASE, PL061_GPIO_PINS }, + { GPIO19_CTRL_BASE, GPIO19_CTRL_PIN_BASE, PL061_GPIO_PINS }, +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + GPIO_PIN_NUMS, GPIO_CTRL_NUMS, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKeyGpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR (Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} diff --git a/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf new file mode 100644 index 0000000..d69c6f4 --- /dev/null +++ b/Platforms/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf @@ -0,0 +1,38 @@ +# +# Copyright (c) 2015-2017, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKeyGpio + FILE_GUID = b51a851c-7bf7-463f-b261-cfb158b7f699 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyGpioEntryPoint + +[Sources.common] + HiKeyGpioDxe.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.dec + +[LibraryClasses] + DebugLib + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE