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[54.225.227.206]) by mx.google.com with ESMTP id g4si982147qkf.442.2017.09.19.07.22.28; Tue, 19 Sep 2017 07:22:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 3E48C6091E; Tue, 19 Sep 2017 14:22:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id D4E566447A; Tue, 19 Sep 2017 14:11:49 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 924E06063E; Tue, 19 Sep 2017 14:06:23 +0000 (UTC) Received: from mail-pf0-f175.google.com (mail-pf0-f175.google.com [209.85.192.175]) by lists.linaro.org (Postfix) with ESMTPS id D673262C5C for ; Tue, 19 Sep 2017 14:06:05 +0000 (UTC) Received: by mail-pf0-f175.google.com with SMTP id r71so27552pfe.12 for ; Tue, 19 Sep 2017 07:06:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LhdF3/fKmhzERXD1VTrhsNmMizHfPdzY8A+5guDD9mQ=; b=NtHFbVhOI9m1cdHH5bGCImlg61NSkN0MlgyWaFuYDxVDANV46wZT0N5mO5JUmnE/ud BLl1Hvtq9LfY59MrWpcF89vaW1T8Qwlnf34iI7IO2g4SXh+PrfFrCJWQSciJpkE4PPuY 4l6Lb99JBdSchYf+rX3N5TlWA0KXJR927aTeKHcXYXp0th2xdWUVqROG7HhvhdeJS6jE 4LVoGrBV2mVh8epHTjNajxpUVGFvCWvx/qxd0/9oy5w5BWqsxQC9jBpq5FWrruUuvTzf 5S9yq0Iy/OVJ/y18O7ebznHMzTUNpQzlRqCWWVOC9Te2/OspIBICXR1hRR9yjjE/StJG JyBw== X-Gm-Message-State: AHPjjUg4rX8vYIv44k8yffR0chFEuRDDPAAS7z856h9RLVBwMsQBjkEp LeZiLUtTLgTkir4Qqbae2qAdboiK X-Google-Smtp-Source: AOwi7QDcc1mbopq6SVXmf2h7p9+VNxkN1t5Oe0f6I4PM3LQsi1MRVYvn9vmo4vBy/7WckTYpwxtBIw== X-Received: by 10.99.9.65 with SMTP id 62mr1410861pgj.395.1505829965133; Tue, 19 Sep 2017 07:06:05 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id 13sm4390439pfm.138.2017.09.19.07.06.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Sep 2017 07:06:04 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Tue, 19 Sep 2017 21:56:34 +0800 Message-Id: <1505829398-52214-29-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> References: <1505829398-52214-1-git-send-email-heyi.guo@linaro.org> Cc: Ming Huang , zhangjinsong2@huawei.com, huangming23@huawei.com, guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v1 28/32] D05/ACPI: Update PXM information according to Iort spec. X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Ming Huang 1. Fix 1P NB PCIe SMMU Length bug. 2. Update PXM information according to Iort spec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: hensonwang --- Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl | 73 +++++++++++++++--------- 1 file changed, 46 insertions(+), 27 deletions(-) diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl index f62b4fc..1f6f313 100644 --- a/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl @@ -112,16 +112,17 @@ //f4 /* 1P NA PCIe SMMU */ [0001] Type : 04 -[0002] Length : 0050 +[0002] Length : 0054 //length added 4 [0001] Revision : 00 [0004] Reserved : 00000000 [0004] Mapping Count : 00000001 -[0004] Mapping Offset : 0000003C +[0004] Mapping Offset : 00000040 //new spec define the length [0008] Base Address : a0040000 -[0004] Flags (decoded below) : 00000001 +[0004] Flags (decoded below) : 00000009 //PXM COHACC Override : 1 HTTU Override : 0 + Proximity Domain Valid: 1 //added for PXM [0004] Reserved : 00000000 [0008] VATOS Address : 0 [0004] Model : 00000001 @@ -129,6 +130,9 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 +[0001] Proximity domain: 00 +[0001] Reserved1: 00 +[0002] Reserved2: 0000 /* this is the map for PCIe2 in 1P NA */ [0004] Input base : 0002f800 [0004] ID Count : 00000800 @@ -137,19 +141,20 @@ [0004] Flags (decoded below) : 00000000 Single Mapping : 0 -//144 +//148 /* 2P NB PCIe SMMU */ [0001] Type : 04 -[0002] Length : 0064 +[0002] Length : 0068 //length added 4 [0001] Revision : 00 [0004] Reserved : 00000000 [0004] Mapping Count : 00000001 -[0004] Mapping Offset : 0000003C +[0004] Mapping Offset : 00000040 //new spec define the length [0008] Base Address : 700a0040000 -[0004] Flags (decoded below) : 00000001 +[0004] Flags (decoded below) : 00000009 //PXM COHACC Override : 1 HTTU Override : 0 + Proximity Domain Valid: 1 //added for PXM [0004] Reserved : 00000000 [0008] VATOS Address : 0 [0004] Model : 00000001 @@ -157,6 +162,9 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 +[0001] Proximity domain: 03 +[0001] Reserved1: 00 +[0002] Reserved2: 0000 /* this is the map for pcie0 in 2p nb */ [0004] Input base : 00002000 [0004] Id count : 00001000 @@ -172,18 +180,19 @@ [0004] Flags (decoded below) : 00000000 Single Mapping : 0 -//1a8 +//1b0 [088h 0136 1] Type : 04 -[089h 0137 2] Length : 003C +[089h 0137 2] Length : 0040 //length added 4 [08Bh 0139 1] Revision : 00 [08Ch 0140 4] Reserved : 00000000 [090h 0144 4] Mapping Count : 00000000 -[094h 0148 4] Mapping Offset : 0000003C +[094h 0148 4] Mapping Offset : 00000040 //new spec define the length [098h 0152 8] Base Address : 00000000C0040000 -[0A0h 0160 4] Flags (decoded below) : 00000001 +[0A0h 0160 4] Flags (decoded below) : 00000009 //PXM COHACC Override : 1 HTTU Override : 0 + Proximity Domain Valid: 1 //added for PXM [0A4h 0164 4] Reserved : 00000000 [0A8h 0168 8] VATOS Address : 0000000000000000 [0B0h 0176 4] Model : 00000001 @@ -191,21 +200,24 @@ [0B8h 0184 4] PRI GSIV : 00000000 [0BCh 0188 4] GERR GSIV : 00000000 [0C0h 0192 4] Sync GSIV : 00000000 +[0001] Proximity domain: 00 +[0001] Reserved1: 00 +[0002] Reserved2: 0000 - -//1e4 +//1F0 /* 1P NB PCIe SMMU */ [0001] Type : 04 -[0002] Length : 0050 +[0002] Length : 0068 //length added 4 [0001] Revision : 00 [0004] Reserved : 00000000 [0004] Mapping Count : 00000001 -[0004] Mapping Offset : 0000003C +[0004] Mapping Offset : 00000040 //new spec define the length [0008] Base Address : 8a0040000 -[0004] Flags (decoded below) : 00000001 +[0004] Flags (decoded below) : 00000009 //PXM COHACC Override : 1 HTTU Override : 0 + Proximity Domain Valid: 1 //added for PXM [0004] Reserved : 00000000 [0008] VATOS Address : 0 [0004] Model : 00000001 @@ -213,6 +225,9 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 +[0001] Proximity domain: 01 +[0001] Reserved1: 00 +[0002] Reserved2: 0000 /* this is the map for PCIe1 in 1P NB */ [0004] Input base : 00017800 [0004] ID Count : 00000800 @@ -228,19 +243,20 @@ [0004] Flags (decoded below) : 00000000 Single Mapping : 0 -//248 +//258 /* 2P NA PCIe SMMU */ [0001] Type : 04 -[0002] Length : 0050 +[0002] Length : 0054 //length added 4 [0001] Revision : 00 [0004] Reserved : 00000000 [0004] Mapping Count : 00000001 -[0004] Mapping Offset : 0000003C +[0004] Mapping Offset : 00000040 //new spec define the length [0008] Base Address : 600a0040000 -[0004] Flags (decoded below) : 00000001 +[0004] Flags (decoded below) : 00000009 //PXM COHACC Override : 1 HTTU Override : 0 + Proximity Domain Valid: 1 //added for PXM [0004] Reserved : 00000000 [0008] VATOS Address : 0 [0004] Model : 00000001 @@ -248,6 +264,9 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 +[0001] Proximity domain: 02 +[0001] Reserved1: 00 +[0002] Reserved2: 0000 /* this is the map for PCIe2 in 2P NA */ [0004] Input base : 00021000 [0004] ID Count : 00001000 @@ -588,7 +607,7 @@ [0004] Input base : 00008800 [0004] ID Count : 00000800 [0004] Output Base : 00008800 -[0004] Output Reference : 000001e4 +[0004] Output Reference : 000001F0 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -617,7 +636,7 @@ [0004] Input base : 00007800 [0004] ID Count : 00000800 [0004] Output Base : 00017800 -[0004] Output Reference : 000001e4 +[0004] Output Reference : 000001F0 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -702,7 +721,7 @@ [0004] Input base : 00001000 [0004] ID Count : 00001000 [0004] Output Base : 00021000 -[0004] Output Reference : 00000248 +[0004] Output Reference : 00000258 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -731,7 +750,7 @@ [0004] Input base : 00002000 [0004] ID Count : 00001000 [0004] Output Base : 00002000 -[0004] Output Reference : 00000144 +[0004] Output Reference : 00000148 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -760,7 +779,7 @@ [0004] Input base : 00003000 [0004] ID Count : 00001000 [0004] Output Base : 00013000 -[0004] Output Reference : 00000144 +[0004] Output Reference : 00000148 [0004] Flags (decoded below) : 00000000 Single Mapping : 0 @@ -855,7 +874,7 @@ [38Ch 0908 4] Input base : 00000000 [390h 0912 4] ID Count : 00000001 [394h 0916 4] Output Base : 00040900 -[398h 0920 4] Output Reference : 000001a8 +[398h 0920 4] Output Reference : 000001b0 [39Ch 0924 4] Flags (decoded below) : 00000001 Single Mapping : 1 @@ -952,6 +971,6 @@ [44Ch 1100 4] Input base : 00000000 [450h 1104 4] ID Count : 00000001 [454h 1108 4] Output Base : 00000000 -[458h 1112 4] Output Reference : 000001a8 +[458h 1112 4] Output Reference : 000001b0 [45Ch 1116 4] Flags (decoded below) : 00000001 Single Mapping : 1