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[54.197.127.237]) by mx.google.com with ESMTP id 1si172174qtt.279.2018.02.22.02.20.19; Thu, 22 Feb 2018 02:20:20 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.197.127.237 as permitted sender) client-ip=54.197.127.237; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.197.127.237 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id AD626607CC; Thu, 22 Feb 2018 10:20:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id B613B61828; Thu, 22 Feb 2018 10:06:51 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id B0A24608C5; Thu, 22 Feb 2018 09:27:21 +0000 (UTC) Received: from mail-pf0-f196.google.com (mail-pf0-f196.google.com [209.85.192.196]) by lists.linaro.org (Postfix) with ESMTPS id AF0626063A for ; Thu, 22 Feb 2018 09:27:18 +0000 (UTC) Received: by mail-pf0-f196.google.com with SMTP id s24so1861109pfm.4 for ; Thu, 22 Feb 2018 01:27:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ckb+0zHx4zlDB3sNbzZ+1oD0yvsP3CVfZJENfx9tAiA=; b=o7rSlpHh9iRZvNlwUmmcW8s0REdQn2Xd7unjmO4ENDJLV4TpuKW82imQ/7jmFHWThA ccxty0YQMDvxqFCewYcwttvgMKFSw/ah7BK56SHF8fpKGOOFjfj+/nGMq7oVorSlxlPq qzuAOKiOemyzByQLTccuMc0zaV4Pe+fLQYAacJIQRNpM0pkTV9TS9jdTmXVZ2LsJc73m EdGRriA48jBTnFBuIXm4m/svY7eBgG2XkG9zpkRglBqBgLuSXU3+5xjSZIJqT5qJvEEf lTy1gpwdyBR9EIRov12PNFiqr4f5MSSPH86f8P4CXQkQTqQCAqkAmKOXyGAUNEfnFlOW JU3w== X-Gm-Message-State: APf1xPD87ImC0+Se7FQSJdS2gri2pFy1pX04hCb9KTtk7VLsh28ndfrV Tnn4c17qNpj/xLEcr9HLZRqAo/Jn X-Received: by 10.167.131.135 with SMTP id u7mr6284360pfm.50.1519291638086; Thu, 22 Feb 2018 01:27:18 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id 63sm62361267pgi.71.2018.02.22.01.27.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Feb 2018 01:27:17 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 22 Feb 2018 17:26:59 +0800 Message-Id: <1519291620-57816-2-git-send-email-ming.huang@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519291620-57816-1-git-send-email-ming.huang@linaro.org> References: <1519291620-57816-1-git-send-email-ming.huang@linaro.org> X-Mailman-Approved-At: Thu, 22 Feb 2018 10:06:50 +0000 Cc: huangming23@huawei.com, john.garry@huawei.com, Ming Huang , zhangjinsong2@huawei.com, Wang Yue , wanghuiqiang@huawei.com, guoheyi@huawei.com, Ming Huang , mengfanrong@huawei.com, huangdaode@hisilicon.com Subject: [Linaro-uefi] [PATCH edk2-platforms v1 1/2] Hilisicon/D03: Change DmaLib for PciHostBridgeDxe X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Change DmaLib from NonCoherentDmaLib to CoherentDmaLib for support cache consistency. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Wang Yue Signed-off-by: Ming Huang --- Platform/Hisilicon/D03/D03.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index c496306..f888d56 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -460,7 +460,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf + DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf }