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[50.57.142.19]) by mx.google.com with ESMTPS id eb17si2720558veb.76.2014.05.13.08.52.40 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 13 May 2014 08:52:40 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WkEyb-0008MF-Al; Tue, 13 May 2014 15:50:45 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WkEyX-0008K7-Ur for xen-devel@lists.xenproject.org; Tue, 13 May 2014 15:50:42 +0000 Received: from [193.109.254.147:31356] by server-4.bemta-14.messagelabs.com id 4F/B2-02781-15F32735; Tue, 13 May 2014 15:50:41 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-5.tower-27.messagelabs.com!1399996240!4538086!1 X-Originating-IP: [74.125.83.53] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22333 invoked from network); 13 May 2014 15:50:40 -0000 Received: from mail-ee0-f53.google.com (HELO mail-ee0-f53.google.com) (74.125.83.53) by server-5.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 13 May 2014 15:50:40 -0000 Received: by mail-ee0-f53.google.com with SMTP id c13so565080eek.12 for ; Tue, 13 May 2014 08:50:40 -0700 (PDT) X-Received: by 10.14.203.71 with SMTP id e47mr8631480eeo.50.1399996239899; Tue, 13 May 2014 08:50:39 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id m44sm41054917eeh.14.2014.05.13.08.50.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 May 2014 08:50:38 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 13 May 2014 16:50:19 +0100 Message-Id: <1399996230-18201-4-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1399996230-18201-1-git-send-email-julien.grall@linaro.org> References: <1399996230-18201-1-git-send-email-julien.grall@linaro.org> Cc: ian.campbell@citrix.com, Julien Grall , tim@xen.org, Jan Beulich , Aravind Gopalakrishnan , Suravee Suthikulpanit , stefano.stabellini@citrix.com Subject: [Xen-devel] [PATCH v5 03/14] xen/passthrough: amd: rename iommu_has_feature into amd_iommu_has_feature X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This function is AMD specific and the name will clash with a newly function added in the IOMMU framework. Signed-off-by: Julien Grall Acked-by: Ian Campbell Acked-by: Aravind Gopalakrishnan Cc: Suravee Suthikulpanit Cc: Jan Beulich --- xen/drivers/passthrough/amd/iommu_detect.c | 2 +- xen/drivers/passthrough/amd/iommu_init.c | 16 ++++++++-------- xen/include/asm-x86/hvm/svm/amd-iommu-proto.h | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c index be1b761..98e5cc2 100644 --- a/xen/drivers/passthrough/amd/iommu_detect.c +++ b/xen/drivers/passthrough/amd/iommu_detect.c @@ -95,7 +95,7 @@ void __init get_iommu_features(struct amd_iommu *iommu) while ( feature_str[i] ) { - if ( iommu_has_feature(iommu, i) ) + if ( amd_iommu_has_feature(iommu, i) ) printk( " %s\n", feature_str[i]); i++; } diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 6ae44d9..b2f74ef 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -884,7 +884,7 @@ static void enable_iommu(struct amd_iommu *iommu) register_iommu_event_log_in_mmio_space(iommu); register_iommu_exclusion_range(iommu); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) register_iommu_ppr_log_in_mmio_space(iommu); desc = irq_to_desc(iommu->msi.irq); @@ -898,15 +898,15 @@ static void enable_iommu(struct amd_iommu *iommu) set_iommu_command_buffer_control(iommu, IOMMU_CONTROL_ENABLED); set_iommu_event_log_control(iommu, IOMMU_CONTROL_ENABLED); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) set_iommu_ppr_log_control(iommu, IOMMU_CONTROL_ENABLED); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_GTSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_GTSUP_SHIFT) ) set_iommu_guest_translation_control(iommu, IOMMU_CONTROL_ENABLED); set_iommu_translation_control(iommu, IOMMU_CONTROL_ENABLED); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) ) amd_iommu_flush_all_caches(iommu); iommu->enabled = 1; @@ -1009,7 +1009,7 @@ static int __init amd_iommu_init_one(struct amd_iommu *iommu) if ( allocate_event_log(iommu) == NULL ) goto error_out; - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) if ( allocate_ppr_log(iommu) == NULL ) goto error_out; @@ -1283,10 +1283,10 @@ static void disable_iommu(struct amd_iommu *iommu) set_iommu_command_buffer_control(iommu, IOMMU_CONTROL_DISABLED); set_iommu_event_log_control(iommu, IOMMU_CONTROL_DISABLED); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_PPRSUP_SHIFT) ) set_iommu_ppr_log_control(iommu, IOMMU_CONTROL_DISABLED); - if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_GTSUP_SHIFT) ) + if ( amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_GTSUP_SHIFT) ) set_iommu_guest_translation_control(iommu, IOMMU_CONTROL_DISABLED); set_iommu_translation_control(iommu, IOMMU_CONTROL_DISABLED); @@ -1356,7 +1356,7 @@ void amd_iommu_resume(void) } /* flush all cache entries after iommu re-enabled */ - if ( !iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) ) + if ( !amd_iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) ) { invalidate_all_devices(); invalidate_all_domain_pages(); diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h index b5abc8f..cf43e29 100644 --- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h @@ -210,7 +210,7 @@ static inline int iommu_has_cap(struct amd_iommu *iommu, uint32_t bit) return !!(iommu->cap.header & (1u << bit)); } -static inline int iommu_has_feature(struct amd_iommu *iommu, uint32_t bit) +static inline int amd_iommu_has_feature(struct amd_iommu *iommu, uint32_t bit) { if ( !iommu_has_cap(iommu, PCI_CAP_EFRSUP_SHIFT) ) return 0;