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[50.57.142.19]) by mx.google.com with ESMTPS id xl2si11806552vec.25.2014.07.01.11.54.31 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 01 Jul 2014 11:54:32 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X23A0-0000jr-Hg; Tue, 01 Jul 2014 18:52:08 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X239z-0000je-JF for xen-devel@lists.xenproject.org; Tue, 01 Jul 2014 18:52:07 +0000 Received: from [85.158.139.211:19573] by server-17.bemta-5.messagelabs.com id 77/0A-08711-65303B35; Tue, 01 Jul 2014 18:52:06 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-11.tower-206.messagelabs.com!1404240726!8919061!1 X-Originating-IP: [74.125.82.48] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 13523 invoked from network); 1 Jul 2014 18:52:06 -0000 Received: from mail-wg0-f48.google.com (HELO mail-wg0-f48.google.com) (74.125.82.48) by server-11.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 1 Jul 2014 18:52:06 -0000 Received: by mail-wg0-f48.google.com with SMTP id n12so9880815wgh.19 for ; Tue, 01 Jul 2014 11:52:05 -0700 (PDT) X-Received: by 10.180.85.71 with SMTP id f7mr37904687wiz.69.1404240725700; Tue, 01 Jul 2014 11:52:05 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id i3sm46146996wiz.13.2014.07.01.11.52.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Jul 2014 11:52:05 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 1 Jul 2014 19:51:59 +0100 Message-Id: <1404240719-13164-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH] xen/arm: Correctly support WARN_ON X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Currently the hypervisor will hang if it hits a WARN_ON. The implemention uses an undefined instruction, made ourself because ARM doesn't provide one, to implement BUG/ASSERT/WARN_ON, and sets up the different tables (one for each type) which contain useful information. This is based on the x86 implementation (include/asm-x86/bug.h). Unfortunately the structure can't be shared because many ARM{32,64} gcc versions doesn't correctly support %c. The support of executing a function in an exception handler is also keep unimplemented on ARM. TODO: I haven't yet hook the code on ARM64 as I'm not sure how undefined instruction are handled. It looks like there is multiple way to get it via HSR. Signed-off-by: Julien Grall --- xen/arch/arm/arm32/traps.c | 2 +- xen/arch/arm/traps.c | 96 +++++++++++++++++++++++++++++++++++++++ xen/arch/arm/xen.lds.S | 8 ++++ xen/include/asm-arm/bug.h | 72 +++++++++++++++++++++++++++-- xen/include/asm-arm/debugger.h | 2 +- xen/include/asm-arm/processor.h | 2 + 6 files changed, 177 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/arm32/traps.c b/xen/arch/arm/arm32/traps.c index ff0b945..f79edcb 100644 --- a/xen/arch/arm/arm32/traps.c +++ b/xen/arch/arm/arm32/traps.c @@ -25,7 +25,7 @@ asmlinkage void do_trap_undefined_instruction(struct cpu_user_regs *regs) { - do_unexpected_trap("Undefined Instruction", regs); + do_undefined_instruction(regs); } asmlinkage void do_trap_supervisor_call(struct cpu_user_regs *regs) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 686d8b7..921ae54 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -1002,6 +1003,101 @@ void do_unexpected_trap(const char *msg, struct cpu_user_regs *regs) panic("CPU%d: Unexpected Trap: %s\n", smp_processor_id(), msg); } +int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc) +{ + const struct bug_frame *bug; + const char *prefix = "", *filename, *predicate; + unsigned long fixup; + int id, lineno; + static const struct bug_frame *const stop_frames[] = { + __stop_bug_frames_0, + __stop_bug_frames_1, + __stop_bug_frames_2, + NULL + }; + + for ( bug = __start_bug_frames, id = 0; stop_frames[id]; ++bug ) + { + while ( unlikely(bug == stop_frames[id]) ) + ++id; + + if ( ((vaddr_t)bug_loc(bug)) == pc ) + break; + } + + if ( !stop_frames[id] ) + return -ENOENT; + + /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ + filename = bug_file(bug); + if ( !is_kernel(filename) ) + return -EINVAL; + fixup = strlen(filename); + if ( fixup > 50 ) + { + filename += fixup - 47; + prefix = "..."; + } + lineno = bug_line(bug); + + switch ( id ) + { + case BUGFRAME_warn: + printk("Xen WARN at %s%s:%d\n", prefix, filename, lineno); + show_execution_state(regs); + return 0; + + case BUGFRAME_bug: + printk("Xen BUG at %s%s:%d\n", prefix, filename, lineno); + + if ( debugger_trap_fatal(TRAP_invalid_op, regs) ) + return 0; + + show_execution_state(regs); + panic("Xen BUG at %s%s:%d", prefix, filename, lineno); + + case BUGFRAME_assert: + /* ASSERT: decode the predicate string pointer. */ + predicate = bug_msg(bug); + if ( !is_kernel(predicate) ) + predicate = ""; + + printk("Assertion '%s' failed at %s%s:%d\n", + predicate, prefix, filename, lineno); + if ( debugger_trap_fatal(TRAP_invalid_op, regs) ) + return 0; + show_execution_state(regs); + panic("Assertion '%s' failed at %s%s:%d", + predicate, prefix, filename, lineno); + } + + return -EINVAL; +} + +void do_undefined_instruction(struct cpu_user_regs *regs) +{ + uint64_t pc = regs->pc; + uint32_t instr; + + if ( !is_kernel_text(pc) && + (system_state >= SYS_STATE_active || !is_kernel_inittext(pc)) ) + goto die; + + /* PC is always 4-byte align, as Xen is using ARM instruction set */ + instr = *((uint32_t *)regs->pc); + if ( instr != BUG_INSTR ) + goto die; + + if ( do_bug_frame(regs, regs->pc) ) + goto die; + + regs->pc += 4; + return; + +die: + do_unexpected_trap("undefined instruction", regs); +} + typedef register_t (*arm_hypercall_fn_t)( register_t, register_t, register_t, register_t, register_t); diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index be55dad..c7a47c2 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -40,6 +40,14 @@ SECTIONS . = ALIGN(PAGE_SIZE); .rodata : { _srodata = .; /* Read-only data */ + /* Bug frames table */ + __start_bug_frames = .; + *(.bug_frames.0) + __stop_bug_frames_0 = .; + *(.bug_frames.1) + __stop_bug_frames_1 = .; + *(.bug_frames.2) + __stop_bug_frames_2 = .; *(.rodata) *(.rodata.*) _erodata = .; /* End of read-only data */ diff --git a/xen/include/asm-arm/bug.h b/xen/include/asm-arm/bug.h index 458c818..0038df4 100644 --- a/xen/include/asm-arm/bug.h +++ b/xen/include/asm-arm/bug.h @@ -1,10 +1,76 @@ #ifndef __ARM_BUG_H__ #define __ARM_BUG_H__ -#define BUG() __bug(__FILE__, __LINE__) -#define WARN() __warn(__FILE__, __LINE__) +#include -#endif /* __X86_BUG_H__ */ +#define BUG_DISP_WIDTH 24 +#define BUG_LINE_LO_WIDTH (31 - BUG_DISP_WIDTH) +#define BUG_LINE_HI_WIDTH (31 - BUG_DISP_WIDTH) + +struct bug_frame { + signed int loc_disp; /* Relative address to the bug address */ + signed int file_disp; /* Relative address to the filename */ + signed int msg_disp; /* Relative address to the predicate (for ASSERT) */ + uint16_t line; /* Line number */ + uint32_t pad0:16; /* Padding for 8-bytes align */ +}; + +#define bug_loc(b) ((const void *)(b) + (b)->loc_disp) +#define bug_file(b) ((const void *)(b) + (b)->file_disp); +#define bug_line(b) ((b)->line) +#define bug_msg(b) ((const char *)(b) + (b)->msg_disp) + +#define BUGFRAME_warn 0 +#define BUGFRAME_bug 1 +#define BUGFRAME_assert 2 + +/* ARM doesn't provide any undefined instruction, make our own based on + * a combination of bits which is not used by the instruction set + */ +#define BUG_INSTR 0xe7f000f0 + +/* Many version of GCC doesn't support the asm %c parameter which would + * be preferable to this unpleasantness. We use mergeable string + * sections to avoid multiple copies of the string appearing in the + * Xen image. + */ +#define BUG_FRAME(type, line, file, has_msg, msg) do { \ + BUILD_BUG_ON((line) >> 16); \ + asm ("1:.word "__stringify(BUG_INSTR)"\n" \ + ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ + "2:\t.asciz " __stringify(file) "\n" \ + "3:\n" \ + ".if " #has_msg "\n" \ + "\t.asciz " #msg "\n" \ + ".endif\n" \ + ".popsection\n" \ + ".pushsection .bug_frames." __stringify(type) ", \"a\", %progbits\n"\ + "4:\n" \ + ".long (1b - 4b)\n" \ + ".long (2b - 4b)\n" \ + ".long (3b - 4b)\n" \ + ".hword " __stringify(line) ", 0\n" \ + ".popsection"); \ +} while (0) + +#define WARN() BUG_FRAME(BUGFRAME_warn, __LINE__, __FILE__, 0, "") + +#define BUG() do { \ + BUG_FRAME(BUGFRAME_bug, __LINE__, __FILE__, 0, ""); \ + unreachable(); \ +} while (0) + +#define assert_failed(msg) do { \ + BUG_FRAME(BUGFRAME_assert, __LINE__, __FILE__, 1, msg); \ + unreachable(); \ +} while (0) + +extern const struct bug_frame __start_bug_frames[], + __stop_bug_frames_0[], + __stop_bug_frames_1[], + __stop_bug_frames_2[]; + +#endif /* __ARM_BUG_H__ */ /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/debugger.h b/xen/include/asm-arm/debugger.h index 916860b..ac776ef 100644 --- a/xen/include/asm-arm/debugger.h +++ b/xen/include/asm-arm/debugger.h @@ -1,7 +1,7 @@ #ifndef __ARM_DEBUGGER_H__ #define __ARM_DEBUGGER_H__ -#define debugger_trap_fatal(v, r) ((void) 0) +#define debugger_trap_fatal(v, r) (0) #define debugger_trap_immediate() ((void) 0) #endif /* __ARM_DEBUGGER_H__ */ diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 3be86f1..ff24ef0 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -480,6 +480,8 @@ void show_registers(struct cpu_user_regs *regs); void do_unexpected_trap(const char *msg, struct cpu_user_regs *regs); +void do_undefined_instruction(struct cpu_user_regs *regs); + void vcpu_regs_hyp_to_user(const struct vcpu *vcpu, struct vcpu_guest_core_regs *regs); void vcpu_regs_user_to_hyp(struct vcpu *vcpu,