From patchwork Thu Sep 25 03:14:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wangyijing X-Patchwork-Id: 37902 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f72.google.com (mail-la0-f72.google.com [209.85.215.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 926A120063 for ; Thu, 25 Sep 2014 02:55:14 +0000 (UTC) Received: by mail-la0-f72.google.com with SMTP id mc6sf1184167lab.11 for ; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:cc:subject:precedence:list-id :list-unsubscribe:list-post:list-help:list-subscribe:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:list-archive:content-type:content-transfer-encoding; bh=85QpryaavMo2fED7rZQALAV+GAl4YUfkee2JsYBcdxY=; b=ORVaSAkkv70JYcw3v92lbzBZ2rC7ShIg5Fnv/3ajfzDx684v6mk0kjx9c2hwE0bQoC 60MhWi12t9/bCQFgKrya//FY/jASrDL3r9aGePrhF/aL2SzKhiMUL2UDzw0VnaZ7ngpg NucUJHdDQcB7syesT8v7agybCP3XoWV9PCkauE62t6IKHA0Al8ks1v9aQgR3QntFE0X2 EUqBP6ADAKgYW5YqbpdiBsTyaNPOd/YjP5EW4JfJLwATe8DMQVbPBeDxrM6H6o1sSiQ5 npCtY7KpkaBC059sePwl8GAwXnhiX4o9vrcBDzwB4V+MnkhCynnKR2f8797kF0LY9q6h PCsg== X-Gm-Message-State: ALoCoQmfp/2/D3oLHCM9v3KGXnFNHRbB4G54cXcG27Yk1cuXysvWzK6UgvZcpHJ0oPxdGooj3/dq X-Received: by 10.112.149.67 with SMTP id ty3mr1618585lbb.1.1411613713364; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.36.66 with SMTP id o2ls227070laj.8.gmail; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) X-Received: by 10.152.19.66 with SMTP id c2mr10428023lae.64.1411613713228; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) Received: from mail-lb0-f178.google.com (mail-lb0-f178.google.com [209.85.217.178]) by mx.google.com with ESMTPS id p5si1040309laf.101.2014.09.24.19.55.13 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Sep 2014 19:55:13 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) client-ip=209.85.217.178; Received: by mail-lb0-f178.google.com with SMTP id z12so9133805lbi.37 for ; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) X-Received: by 10.112.78.38 with SMTP id y6mr352929lbw.94.1411613713165; Wed, 24 Sep 2014 19:55:13 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.130.169 with SMTP id of9csp683515lbb; Wed, 24 Sep 2014 19:55:12 -0700 (PDT) X-Received: by 10.220.116.196 with SMTP id n4mr9277780vcq.6.1411613711861; Wed, 24 Sep 2014 19:55:11 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id cv1si527218vdc.22.2014.09.24.19.55.11 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 24 Sep 2014 19:55:11 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XWzBO-0004az-GF; Thu, 25 Sep 2014 02:53:26 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XWzBL-0004Um-D3 for xen-devel@lists.xenproject.org; Thu, 25 Sep 2014 02:53:23 +0000 Received: from [85.158.137.68:42861] by server-15.bemta-3.messagelabs.com id DC/5C-01573-2A383245; Thu, 25 Sep 2014 02:53:22 +0000 X-Env-Sender: wangyijing@huawei.com X-Msg-Ref: server-13.tower-31.messagelabs.com!1411613598!11914867!1 X-Originating-IP: [119.145.14.65] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NSA9PiA3NzQ2Mw==\n X-StarScan-Received: X-StarScan-Version: 6.12.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 14053 invoked from network); 25 Sep 2014 02:53:21 -0000 Received: from szxga02-in.huawei.com (HELO szxga02-in.huawei.com) (119.145.14.65) by server-13.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 25 Sep 2014 02:53:21 -0000 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BZX30367; Thu, 25 Sep 2014 10:50:43 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Thu, 25 Sep 2014 10:50:32 +0800 From: Yijing Wang To: Bjorn Helgaas Date: Thu, 25 Sep 2014 11:14:19 +0800 Message-ID: <1411614872-4009-10-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, Yijing Wang , Thierry Reding , sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Michael Ellerman , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Xinwei Hu , Tony Luck , Sergei Shtylyov , linux-kernel@vger.kernel.org, Ralf Baechle , iommu@lists.linux-foundation.org, David Vrabel , Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" , Lucas Stach Subject: [Xen-devel] [PATCH v2 09/22] x86/xen/MSI: Use MSI chip framework to configure MSI/MSI-X irq X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Tested-by: Konrad Rzeszutek Wilk Signed-off-by: Yijing Wang Acked-by: David Vrabel Reviewed-by: Konrad Rzeszutek Wilk CC: Konrad Rzeszutek Wilk --- arch/x86/pci/xen.c | 46 ++++++++++++++++++++++++++++++---------------- 1 files changed, 30 insertions(+), 16 deletions(-) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 84c2fce..e669ee4 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -376,6 +376,11 @@ static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) } #endif +static void xen_teardown_msi_irq(unsigned int irq) +{ + xen_destroy_irq(irq); +} + static void xen_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc; @@ -385,19 +390,26 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev) xen_pci_frontend_disable_msix(dev); else xen_pci_frontend_disable_msi(dev); - - /* Free the IRQ's and the msidesc using the generic code. */ - default_teardown_msi_irqs(dev); -} - -static void xen_teardown_msi_irq(unsigned int irq) -{ - xen_destroy_irq(irq); + + list_for_each_entry(msidesc, &dev->msi_list, list) { + int i, nvec; + if (msidesc->irq == 0) + continue; + if (msidesc->nvec_used) + nvec = msidesc->nvec_used; + else + nvec = 1 << msidesc->msi_attrib.multiple; + for (i = 0; i < nvec; i++) + xen_teardown_msi_irq(msidesc->irq + i); + } } void xen_nop_msi_mask(struct irq_data *data) { } + +struct msi_chip xen_msi_chip; + #endif int __init pci_xen_init(void) @@ -418,9 +430,9 @@ int __init pci_xen_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; + xen_msi_chip.setup_irqs = xen_setup_msi_irqs; + xen_msi_chip.teardown_irqs = xen_teardown_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif @@ -441,8 +453,9 @@ int __init pci_xen_hvm_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; + xen_msi_chip.setup_irqs = xen_hvm_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + x86_msi_chip = &xen_msi_chip; #endif return 0; } @@ -499,9 +512,10 @@ int __init pci_xen_initial_domain(void) int irq; #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; + xen_msi_chip.setup_irqs = xen_initdom_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + xen_msi_chip.restore_irqs = xen_initdom_restore_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif