From patchwork Tue Oct 14 15:52:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 38725 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f197.google.com (mail-lb0-f197.google.com [209.85.217.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 7DE4C20973 for ; Tue, 14 Oct 2014 15:54:34 +0000 (UTC) Received: by mail-lb0-f197.google.com with SMTP id p9sf5511776lbv.8 for ; Tue, 14 Oct 2014 08:54:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:cc:subject :precedence:list-id:list-unsubscribe:list-post:list-help :list-subscribe:mime-version:sender:errors-to:x-original-sender :x-original-authentication-results:mailing-list:list-archive :content-type:content-transfer-encoding; bh=GU1G50SshcKgoyJXG/zx+xs2xWih95U5gCpEvgGD/6w=; b=SXzO7IjNfMBgeTJ77ViiCApUuum5eyLqUw04AmLogVDdRUdfe+Pg/Dy3Nq+XNrVPVv rZamcGxzfbPCY7c6AweT8ZHcv21pNhaTqgZ9J4K0fawBDCmyd5Xtu9T2pUWxg5VG4sy5 dXhMQAaTUoZ4heD/UAEuT1+MAuxPbliSb3047+83wGGY867nRDWfrHswdu6SAvBGHh/1 ikz8w04QebiAL+524ZzYxkxgNJywTYB21QeAIu0b/ohKr6l3VWkP/2PgnfZ9zGfLOzS0 wUu39Po6SmohgU66jN0Jtx9xBnWPXjanJg4jDRcRzClJnPHrMEiMbcjxL/8gfqa/sROT 83PQ== X-Gm-Message-State: ALoCoQmvYk4SCaPm4eivB7UPnCpLB68HXWXA0JNLNEQDt/h7VaCyvv0NsKw8VBgK8Zi5J+wlhj06 X-Received: by 10.112.97.35 with SMTP id dx3mr48838lbb.20.1413302069715; Tue, 14 Oct 2014 08:54:29 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.7.169 with SMTP id k9ls607998laa.91.gmail; Tue, 14 Oct 2014 08:54:29 -0700 (PDT) X-Received: by 10.113.5.7 with SMTP id ci7mr6369157lbd.9.1413302069563; Tue, 14 Oct 2014 08:54:29 -0700 (PDT) Received: from mail-la0-f53.google.com (mail-la0-f53.google.com [209.85.215.53]) by mx.google.com with ESMTPS id ws1si26973226lbb.66.2014.10.14.08.54.28 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 Oct 2014 08:54:28 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) client-ip=209.85.215.53; Received: by mail-la0-f53.google.com with SMTP id gq15so8675761lab.26 for ; Tue, 14 Oct 2014 08:54:28 -0700 (PDT) X-Received: by 10.112.12.35 with SMTP id v3mr711998lbb.80.1413302068830; Tue, 14 Oct 2014 08:54:28 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp426667lbz; Tue, 14 Oct 2014 08:54:27 -0700 (PDT) X-Received: by 10.221.16.198 with SMTP id pz6mr1919151vcb.60.1413302067073; Tue, 14 Oct 2014 08:54:27 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id m9si15485278vcl.104.2014.10.14.08.54.26 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 14 Oct 2014 08:54:27 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xe4Oo-0001Ye-BV; Tue, 14 Oct 2014 15:52:34 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xe4Om-0001YX-B1 for xen-devel@lists.xenproject.org; Tue, 14 Oct 2014 15:52:32 +0000 Received: from [85.158.137.68:3813] by server-10.bemta-3.messagelabs.com id CC/C7-01456-FB64D345; Tue, 14 Oct 2014 15:52:31 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-14.tower-31.messagelabs.com!1413301950!10982648!1 X-Originating-IP: [209.85.212.173] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.12.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 18704 invoked from network); 14 Oct 2014 15:52:30 -0000 Received: from mail-wi0-f173.google.com (HELO mail-wi0-f173.google.com) (209.85.212.173) by server-14.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 14 Oct 2014 15:52:30 -0000 Received: by mail-wi0-f173.google.com with SMTP id fb4so10543716wid.12 for ; Tue, 14 Oct 2014 08:52:30 -0700 (PDT) X-Received: by 10.180.77.79 with SMTP id q15mr6411742wiw.8.1413301950184; Tue, 14 Oct 2014 08:52:30 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id w10sm20652548wje.10.2014.10.14.08.52.28 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Oct 2014 08:52:29 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 14 Oct 2014 16:52:21 +0100 Message-Id: <1413301941-31853-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 Cc: ian.campbell@citrix.com, Julien Grall , tim@xen.org, stefano.stabellini@citrix.com, Jan Beulich Subject: [Xen-devel] [PATCH v2 for 4.5] arm32: fix build after 063188f4b3 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: "xen: arm: Add support for the Exynos secure firmware" introduced code assuming that exynos_smc() would get called with arguments in certain registers. While the "noinline" attribute guarantees the function to not get inlined, it does not guarantee that all arguments arrive in the assumed registers: gcc's interprocedural analysis can result in clone functions to be created where some of the incoming arguments (commonly when they have constant values) get replaced by putting in place the respective values inside the clone. Xen contains in multiple place of this SMC function: consolidate the function in a single place and write it in assembly. Signed-off-by: Julien Grall Signed-off-by: Jan Beulich --- This is a fix for Xen 4.5 to compile the hypervisor with GCC 4.9.1, used by Fedora & co. Jan: I kept your Signed-off-by for the commit message. Changes in v2: - Write the SMC call in assembly - Consolidate the code in a single place --- xen/arch/arm/arm32/Makefile | 1 + xen/arch/arm/arm32/smc.S | 19 +++++++++++++++++++ xen/arch/arm/arm64/Makefile | 1 + xen/arch/arm/arm64/smc.S | 19 +++++++++++++++++++ xen/arch/arm/platforms/exynos5.c | 15 +-------------- xen/arch/arm/platforms/seattle.c | 12 ++---------- xen/arch/arm/psci.c | 29 ++--------------------------- xen/include/asm-arm/processor.h | 2 ++ 8 files changed, 47 insertions(+), 51 deletions(-) create mode 100644 xen/arch/arm/arm32/smc.S create mode 100644 xen/arch/arm/arm64/smc.S diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile index df0e7de..51b64f9 100644 --- a/xen/arch/arm/arm32/Makefile +++ b/xen/arch/arm/arm32/Makefile @@ -8,5 +8,6 @@ obj-y += domain.o obj-y += vfp.o obj-y += smpboot.o obj-y += domctl.o +obj-y += smc.o obj-$(EARLY_PRINTK) += debug.o diff --git a/xen/arch/arm/arm32/smc.S b/xen/arch/arm/arm32/smc.S new file mode 100644 index 0000000..ea1dba5 --- /dev/null +++ b/xen/arch/arm/arm32/smc.S @@ -0,0 +1,19 @@ +/* + * xen/arch/arm/arm32/smc.S + * + * Wrapper for Secure Monitors Calls + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +GLOBAL(do_smc) + smc #0 + mov pc, lr diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile index c7243f5..4debaf4 100644 --- a/xen/arch/arm/arm64/Makefile +++ b/xen/arch/arm/arm64/Makefile @@ -1,6 +1,7 @@ subdir-y += lib obj-y += entry.o +obj-y += smc.o obj-y += traps.o obj-y += domain.o diff --git a/xen/arch/arm/arm64/smc.S b/xen/arch/arm/arm64/smc.S new file mode 100644 index 0000000..dfe3f02 --- /dev/null +++ b/xen/arch/arm/arm64/smc.S @@ -0,0 +1,19 @@ +/* + * xen/arch/arm/arm64/smc.S + * + * Wrapper for Secure Monitors Calls + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +GLOBAL(do_smc) + smc #0 + ret diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c index ac556cb..0b6e884 100644 --- a/xen/arch/arm/platforms/exynos5.c +++ b/xen/arch/arm/platforms/exynos5.c @@ -37,19 +37,6 @@ static bool_t secure_firmware; #define SMC_CMD_CPU1BOOT (-4) -static noinline void exynos_smc(register_t function_id, register_t arg0, - register_t arg1, register_t arg2) -{ - asm volatile( - __asmeq("%0", "r0") - __asmeq("%1", "r1") - __asmeq("%2", "r2") - __asmeq("%3", "r3") - "smc #0" - : - : "r" (function_id), "r" (arg0), "r" (arg1), "r" (arg2)); -} - static int exynos5_init_time(void) { uint32_t reg; @@ -263,7 +250,7 @@ static int exynos5_cpu_up(int cpu) iounmap(power); if ( secure_firmware ) - exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); + do_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); return cpu_up_send_sgi(cpu); } diff --git a/xen/arch/arm/platforms/seattle.c b/xen/arch/arm/platforms/seattle.c index edfc391..91b3c47 100644 --- a/xen/arch/arm/platforms/seattle.c +++ b/xen/arch/arm/platforms/seattle.c @@ -31,22 +31,14 @@ static const char * const seattle_dt_compat[] __initconst = * This is temporary until full PSCI-0.2 is supported. * Then, these function will be removed. */ -static noinline void seattle_smc_psci(register_t func_id) -{ - asm volatile( - "smc #0" - : "+r" (func_id) - :); -} - static void seattle_system_reset(void) { - seattle_smc_psci(PSCI_0_2_FN_SYSTEM_RESET); + do_smc(PSCI_0_2_FN_SYSTEM_RESET); } static void seattle_system_off(void) { - seattle_smc_psci(PSCI_0_2_FN_SYSTEM_OFF); + do_smc(PSCI_0_2_FN_SYSTEM_OFF); } PLATFORM_START(seattle, "SEATTLE") diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index b6360d5..7f1f628 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -25,37 +25,12 @@ bool_t psci_available; -#ifdef CONFIG_ARM_32 -#define REG_PREFIX "r" -#else -#define REG_PREFIX "x" -#endif - -static noinline int __invoke_psci_fn_smc(register_t function_id, - register_t arg0, - register_t arg1, - register_t arg2) -{ - asm volatile( - __asmeq("%0", REG_PREFIX"0") - __asmeq("%1", REG_PREFIX"1") - __asmeq("%2", REG_PREFIX"2") - __asmeq("%3", REG_PREFIX"3") - "smc #0" - : "+r" (function_id) - : "r" (arg0), "r" (arg1), "r" (arg2)); - - return function_id; -} - -#undef REG_PREFIX - static uint32_t psci_cpu_on_nr; int call_psci_cpu_on(int cpu) { - return __invoke_psci_fn_smc(psci_cpu_on_nr, - cpu_logical_map(cpu), __pa(init_secondary), 0); + return do_smc(psci_cpu_on_nr, cpu_logical_map(cpu), + __pa(init_secondary), 0); } int __init psci_init(void) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index e719c26..5b7385c 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -614,6 +614,8 @@ void vcpu_regs_hyp_to_user(const struct vcpu *vcpu, void vcpu_regs_user_to_hyp(struct vcpu *vcpu, const struct vcpu_guest_core_regs *regs); +int do_smc(register_t function_id, ...); + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARM_PROCESSOR_H */ /*