From patchwork Fri Aug 24 16:58:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145090 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475079ljw; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYiwxbz4zdUvKXKV/k9h2oetMSGOVHnlX+p+uv6KawJHPJLHHA+SMCRohInmljVAXunmwXO X-Received: by 2002:a6b:4515:: with SMTP id s21-v6mr1826382ioa.273.1535130048964; Fri, 24 Aug 2018 10:00:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130048; cv=none; d=google.com; s=arc-20160816; b=PwcR/3X88yyN8aSdkwjoKCjdG5wrvzS0hMT6WJ8u9kIZ0ZQ6oBH8AhGIJVnF64KtKe HMubZiutuACS5iShU5rOuJm8aqU6UmMrJZW9fOUzVH5oZL1qMb0li04I9Spycl72petR NueGG2poYUDtyY08TDip8IjmdVQERuLBNv/tnG2cE+UdUel2XIk+Es+Bfnjqmi+YMwaO e9HI3h2U09Ok7EEQnQLzcnhA7RfrHUQf0QYlQygl2PIulwXjRKUk6M0YzR9j0wKokO7e cG9ymXVwldUUNeRiZcI+gnFGIpo0EfE55imIGOEm6tmJrZUd2jh3a0V6SGBwi8gnMrnL REDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=lZ/0N8gZFvrpGYPDTPhPJJvBj9O/J88IwZuLw141Tp0=; b=u1+GgeQMkO7DRBVBO4pjwMvrIWu8eA2FYWo3oF4cT3gSiutse44ivptcZFGT0jsTRG u4cLtyyFyzw7wuBCyZlwj86H2m3Rqh2JVdkRFvTXt2Ara7hC0dWnK4CVSG8FigdmrgPk bTynDoSZaU2MPLjIVmtTkXa9b0d+71JE5pUrRZnc9c1JWNNlQW2+CN9345B+MZWink+Z 5A6r1h07xAmi10B6H4HAz5wvkA5vtb2aoq6wmGm/8wocA2Tm+OuCBu0m+5vMuanq4TkN hbNWOn7d3SN5Oni1F9SyV9nWFGClpgkvkOST0MqRM3NAZBS4eaPGy1GdSaLPKZf31pHL fuWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id e3-v6si5030700ioa.85.2018.08.24.10.00.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPv-00006S-A6; Fri, 24 Aug 2018 16:58:35 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPu-00005x-1f for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:34 +0000 X-Inumbo-ID: 0768872b-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 0768872b-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:14 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6BD1B1650; Fri, 24 Aug 2018 09:58:33 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8148E3F5A0; Fri, 24 Aug 2018 09:58:32 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:19 +0100 Message-Id: <20180824165820.32620-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 5/6] xen/arm: smccc: Add wrapper to automatically select the calling convention X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/psci.c | 4 ++++ xen/include/asm-arm/cpufeature.h | 3 ++- xen/include/asm-arm/smccc.h | 8 ++++++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 3cf5ecf0f3..941eec921b 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -118,6 +119,9 @@ static void __init psci_init_smccc(void) smccc_ver = ret; } + if ( smccc_ver >= SMCCC_VERSION(1, 1) ) + cpus_set_cap(ARM_SMCCC_1_1); + printk(XENLOG_INFO "Using SMC Calling Convention v%u.%u\n", SMCCC_VERSION_MAJOR(smccc_ver), SMCCC_VERSION_MINOR(smccc_ver)); } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 9c297c521c..c9c4046f5f 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -44,8 +44,9 @@ #define SKIP_CTXT_SWITCH_SERROR_SYNC 6 #define ARM_HARDEN_BRANCH_PREDICTOR 7 #define ARM_SSBD 8 +#define ARM_SMCCC_1_1 9 -#define ARM_NCAPS 9 +#define ARM_NCAPS 10 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 1ed6cbaa48..7c39c530e2 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -213,6 +213,7 @@ struct arm_smccc_res { */ #ifdef CONFIG_ARM_32 #define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) +#define arm_smccc_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) #else void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, @@ -254,6 +255,13 @@ void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, #define arm_smccc_1_0_smc(...) \ __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) +#define arm_smccc_smc(...) \ + do { \ + if ( !cpus_have_const_cap(ARM_SMCCC_1_1) ) \ + arm_smccc_1_0_smc(__VA_ARGS__); \ + else \ + arm_smccc_1_1_smc(__VA_ARGS__); \ + } while ( 0 ) #endif /* CONFIG_ARM_64 */ #endif /* __ASSEMBLY__ */