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[v6,00/10] Add support for audio on SC7280 based targets

Message ID 1637928282-2819-1-git-send-email-srivasam@codeaurora.org
Headers show
Series Add support for audio on SC7280 based targets | expand

Message

Srinivasa Rao Mandadapu Nov. 26, 2021, 12:04 p.m. UTC 
This patch set is to add support for Audio over wcd codec,
digital mics, through digital codecs and without ADSP.

Changes Since V5:
    -- Include MI2S primary node to snd_soc_dai_driver in lpass-sc7280 platform driver.
    -- Move dependency patch list to corresponding patch.
    -- Add support for missing cdc-dma ports.
    -- Change if/else conditional statements to switch cases.
    -- Add missing error handlings.
    -- Typo errors fix.
Changes Since V4:
    -- Remove unused variable in lpass-sc7280 platform driver.
Changes Since V3:
    -- Remove redundant power domain controls. As power domains can be configured from dtsi.
Changes Since V2:
    -- Split lpass sc7280 cpu driver patch and create regmap config patch.
    -- Create patches based on latest kernel tip.
    -- Add helper function to get dma control and lpaif handle.
    -- Remove unused variables.
Changes Since V1:
    -- Typo errors fix
    -- CPU driver readable/writable apis optimization.
    -- Add Missing config patch
    -- Add Common api for repeated dmactl initialization.

Srinivasa Rao Mandadapu (10):
  ASoC: qcom: Move lpass_pcm_data structure to lpass header
  ASoC: qcom: lpass: Add dma fields for codec dma lpass interface
  ASoC: qcom: Add register definition for codec rddma and wrdma
  ASoC: qcom: Add lpass CPU driver for codec dma control
  ASoC: qcom: Add helper function to get dma control and lpaif handle
  ASoC: qcom: Add support for codec dma driver
  ASoC: qcom: Add regmap config support for codec dma driver
  ASoC: dt-bindings: Add SC7280 lpass cpu bindings
  ASoC: qcom: lpass-sc7280: Add platform driver for lpass audio
  ASoC: qcom: SC7280: Update config for building codec dma drivers

 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  |  69 ++-
 sound/soc/qcom/Kconfig                             |  13 +
 sound/soc/qcom/Makefile                            |   4 +
 sound/soc/qcom/lpass-cdc-dma.c                     | 275 ++++++++++
 sound/soc/qcom/lpass-cpu.c                         | 244 ++++++++-
 sound/soc/qcom/lpass-lpaif-reg.h                   | 103 +++-
 sound/soc/qcom/lpass-platform.c                    | 578 ++++++++++++++++++---
 sound/soc/qcom/lpass-sc7280.c                      | 434 ++++++++++++++++
 sound/soc/qcom/lpass.h                             | 151 ++++++
 9 files changed, 1784 insertions(+), 87 deletions(-)
 create mode 100644 sound/soc/qcom/lpass-cdc-dma.c
 create mode 100644 sound/soc/qcom/lpass-sc7280.c

Comments

Srinivasa Rao Mandadapu Dec. 2, 2021, 10:55 a.m. UTC | #1 
On 12/1/2021 8:21 PM, Srinivas Kandagatla wrote:
Thanks for your time Srini!!!
>
> On 26/11/2021 12:04, Srinivasa Rao Mandadapu wrote:
>> This patch adds register definitions for codec read dma and write dma
>> lpass interface.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
>> Co-developed-by: Venkata Prasad Potturu <potturu@codeaurora.org>
>> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
>> ---
>>   sound/soc/qcom/lpass-lpaif-reg.h | 103 
>> ++++++++++++++++++++++++++++++++++++---
>>   1 file changed, 97 insertions(+), 6 deletions(-)
>>
>> diff --git a/sound/soc/qcom/lpass-lpaif-reg.h 
>> b/sound/soc/qcom/lpass-lpaif-reg.h
>> index 2eb03ad..697a11f 100644
>> --- a/sound/soc/qcom/lpass-lpaif-reg.h
>> +++ b/sound/soc/qcom/lpass-lpaif-reg.h
>> @@ -74,6 +74,16 @@
>>   #define LPAIF_IRQSTAT_REG(v, port)    LPAIF_IRQ_REG_ADDR(v, 0x4, 
>> (port))
>>   #define LPAIF_IRQCLEAR_REG(v, port)    LPAIF_IRQ_REG_ADDR(v, 0xC, 
>> (port))
>>   +/* LPAIF RXTX IRQ */
>> +#define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port, dai_id) \
>> +        ((dai_id == LPASS_CDC_DMA_RX0 || dai_id == 
>> LPASS_CDC_DMA_TX3) ? \
>> +        (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * 
>> (port)) : \
>> +        (v->va_irq_reg_base + (addr) + v->va_irq_reg_stride * (port)))
>> +
>> +#define LPAIF_RXTX_IRQEN_REG(v, port, dai_id) 
>> LPAIF_RXTX_IRQ_REG_ADDR(v, 0x0, port, dai_id)
>> +#define LPAIF_RXTX_IRQSTAT_REG(v, port, dai_id) 
>> LPAIF_RXTX_IRQ_REG_ADDR(v, 0x4, port, dai_id)
>> +#define LPAIF_RXTX_IRQCLEAR_REG(v, port, dai_id) 
>> LPAIF_RXTX_IRQ_REG_ADDR(v, 0xC, port, dai_id)
>> +
>
> How about doing like this:
>
>
> /* LPAIF RXTX IRQ */
> #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \
>         (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port))
>
> #define LPAIF_RXTX_IRQEN_REG(v, port, dai_id) 
> LPAIF_RXTX_IRQ_REG_ADDR(v, 0x0, port)
> #define LPAIF_RXTX_IRQSTAT_REG(v, port, dai_id) 
> LPAIF_RXTX_IRQ_REG_ADDR(v, 0x4, port)
> #define LPAIF_RXTX_IRQCLEAR_REG(v, port, dai_id) 
> LPAIF_RXTX_IRQ_REG_ADDR(v, 0xC, port)
>
> /* LPAIF VA IRQ */
> #define LPAIF_VA_IRQ_REG_ADDR(v, addr, port) \
>         (v->va_irq_reg_base + (addr) + v->va_irq_reg_stride * (port))
>
> #define LPAIF_VA_IRQEN_REG(v, port, dai_id) LPAIF_VA_IRQ_REG_ADDR(v, 
> 0x0, port)
> #define LPAIF_VA_IRQSTAT_REG(v, port, dai_id) LPAIF_VA_IRQ_REG_ADDR(v, 
> 0x4, port)
> #define LPAIF_VA_IRQCLEAR_REG(v, port, dai_id) 
> LPAIF_VA_IRQ_REG_ADDR(v, 0xC, port)
>
With this we are seeing number macros increasing. How about handling 
like below.
> lpass.h:

static inline bool is_rxtx_cdc_dma_port(int dai_id)
{

     switch (dai_id) {
         case LPASS_CDC_DMA_RX0 ... LPASS_CDC_DMA_RX9:
         case LPASS_CDC_DMA_TX0 ... LPASS_CDC_DMA_TX8:
             return true;
         default:
             return false;
       }
}


Usage:

#define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port, dai_id) \
is_rxtx_cdc_dma_port(dai_id) ? \
(v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port)) : \
(v->va_irq_reg_base + (addr) + v->va_irq_reg_stride * (port))


>
>>     #define LPASS_HDMITX_APP_IRQ_REG_ADDR(v, addr)  \
>>       ((v->hdmi_irq_reg_base) + (addr))
>> @@ -139,12 +149,93 @@
>>           (LPAIF_INTFDMA_REG(v, chan, reg, dai_id)) : \
>>           LPAIF_WRDMA##reg##_REG(v, chan))
>>   -#define LPAIF_DMACTL_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, 
>> chan, dir, CTL, dai_id)
>> -#define LPAIF_DMABASE_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, 
>> chan, dir, BASE, dai_id)
>> -#define    LPAIF_DMABUFF_REG(v, chan, dir, dai_id) 
>> __LPAIF_DMA_REG(v, chan, dir, BUFF, dai_id)
>> -#define LPAIF_DMACURR_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, 
>> chan, dir, CURR, dai_id)
>> -#define    LPAIF_DMAPER_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, 
>> chan, dir, PER, dai_id)
>> -#define    LPAIF_DMAPERCNT_REG(v, chan, dir, dai_id) 
>> __LPAIF_DMA_REG(v, chan, dir, PERCNT, dai_id)
>> +#define LPAIF_DMACTL_REG(v, chan, dir, dai_id)  \
>> +    (((dai_id == LPASS_CDC_DMA_RX0) || \
>> +    (dai_id == LPASS_CDC_DMA_TX3) || \
>> +    (dai_id == LPASS_CDC_DMA_VA_TX0)) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, CTL, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, CTL, dai_id))
>
>
> How about:
>
> #define LPAIF_DMACTL_REG(v, chan, dir, dai_id)  \
>     is_cdc_dma_port(dai_id) ? \
>     __LPAIF_CDC_DMA_REG(v, chan, dir, CTL, dai_id) : \
>     __LPAIF_DMA_REG(v, chan, dir, CTL, dai_id)
>
Yes this looks clean and handles all ports.
>
> simillar comments to most of the macros in this patch that are 
> directly comparing the dai_ids.
Okay. Will change accordingly.
>
>
>> +#define LPAIF_DMABASE_REG(v, chan, dir, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +    dai_id == LPASS_CDC_DMA_TX3 || \
>> +    dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, BASE, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, BASE, dai_id))
>> +#define LPAIF_DMABUFF_REG(v, chan, dir, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +    dai_id == LPASS_CDC_DMA_TX3 || \
>> +    dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, BUFF, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, BUFF, dai_id))
>> +#define LPAIF_DMACURR_REG(v, chan, dir, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +    dai_id == LPASS_CDC_DMA_TX3 || \
>> +    dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, CURR, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, CURR, dai_id))
>> +#define LPAIF_DMAPER_REG(v, chan, dir, dai_id)  \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +    dai_id == LPASS_CDC_DMA_TX3 || \
>> +    dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, PER, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, PER, dai_id))
>> +#define LPAIF_DMAPERCNT_REG(v, chan, dir, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +    dai_id == LPASS_CDC_DMA_TX3 || \
>> +    dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +    __LPAIF_CDC_DMA_REG(v, chan, dir, PERCNT, dai_id) : \
>> +    __LPAIF_DMA_REG(v, chan, dir, PERCNT, dai_id))
>> +
>> +#define LPAIF_CDC_RDMA_REG_ADDR(v, addr, chan, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || dai_id == LPASS_CDC_DMA_TX3) ? \
>> +    (v->rxtx_rdma_reg_base + (addr) + v->rxtx_rdma_reg_stride * 
>> (chan)) : \
>> +    (v->va_rdma_reg_base + (addr) + v->va_rdma_reg_stride * (chan)))
>> +
>> +#define LPAIF_CDC_RDMACTL_REG(v, chan, dai_id) 
>> LPAIF_CDC_RDMA_REG_ADDR(v, 0x00, (chan), dai_id)
>> +#define LPAIF_CDC_RDMABASE_REG(v, chan, dai_id) 
>> LPAIF_CDC_RDMA_REG_ADDR(v, 0x04, (chan), dai_id)
>> +#define LPAIF_CDC_RDMABUFF_REG(v, chan, dai_id) 
>> LPAIF_CDC_RDMA_REG_ADDR(v, 0x08, (chan), dai_id)
>> +#define LPAIF_CDC_RDMACURR_REG(v, chan, dai_id) 
>> LPAIF_CDC_RDMA_REG_ADDR(v, 0x0C, (chan), dai_id)
>> +#define LPAIF_CDC_RDMAPER_REG(v, chan, dai_id) 
>> LPAIF_CDC_RDMA_REG_ADDR(v, 0x10, (chan), dai_id)
>> +
>> +#define LPAIF_CDC_RDMA_INTF_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_RDMA_REG_ADDR(v, 0x50, (chan), dai_id)
>> +
>> +#define LPAIF_CDC_WRDMA_REG_ADDR(v, addr, chan, dai_id) \
>> +    ((dai_id == LPASS_CDC_DMA_RX0 || dai_id == LPASS_CDC_DMA_TX3) ? \
>> +    (v->rxtx_wrdma_reg_base + (addr) + \
>> +    v->rxtx_wrdma_reg_stride * (chan - v->rxtx_wrdma_channel_start)) 
>> : \
>> +    (v->va_wrdma_reg_base + (addr) + \
>> +    v->va_wrdma_reg_stride * (chan - v->va_wrdma_channel_start)))
>
> Can we split this to LPAIF_CDC_TXRX_WRDMA_REG_ADDR and
> LPAIF_CDC_VA_WRDMA_REG_ADDR macros?

How about this way?

#define LPAIF_CDC_WRDMA_REG_ADDR(v, addr, chan, dai_id) \
is_rxtx_cdc_dma_port(dai_id) ? \
(v->rxtx_wrdma_reg_base + (addr) + \
v->rxtx_wrdma_reg_stride * (chan - v->rxtx_wrdma_channel_start)) : \
(v->va_wrdma_reg_base + (addr) + \
v->va_wrdma_reg_stride * (chan - v->va_wrdma_channel_start))

>
> --srini
>
>> +
>> +#define LPAIF_CDC_WRDMACTL_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x00, (chan), dai_id)
>> +#define LPAIF_CDC_WRDMABASE_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x04, (chan), dai_id)
>> +#define LPAIF_CDC_WRDMABUFF_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x08, (chan), dai_id)
>> +#define LPAIF_CDC_WRDMACURR_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x0C, (chan), dai_id)
>> +#define LPAIF_CDC_WRDMAPER_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x10, (chan), dai_id)
>> +#define LPAIF_CDC_WRDMA_INTF_REG(v, chan, dai_id) \
>> +    LPAIF_CDC_WRDMA_REG_ADDR(v, 0x50, (chan), dai_id)
>> +
>> +#define __LPAIF_CDC_DMA_REG(v, chan, dir, reg, dai_id)  \
>> +        ((dir ==  SNDRV_PCM_STREAM_PLAYBACK) ? \
>> +        (LPAIF_CDC_RDMA##reg##_REG(v, chan, dai_id)) : \
>> +        LPAIF_CDC_WRDMA##reg##_REG(v, chan, dai_id))
>> +
>> +#define LPAIF_CDC_INTF_REG(v, chan, dir, dai_id) \
>> +        ((dir ==  SNDRV_PCM_STREAM_PLAYBACK) ? \
>> +        LPAIF_CDC_RDMA_INTF_REG(v, chan, dai_id) : \
>> +        LPAIF_CDC_WRDMA_INTF_REG(v, chan, dai_id))
>> +
>> +#define LPAIF_INTF_REG(v, chan, dir, dai_id) \
>> +        ((dai_id == LPASS_CDC_DMA_RX0 || \
>> +        dai_id == LPASS_CDC_DMA_TX3 || \
>> +        dai_id == LPASS_CDC_DMA_VA_TX0) ? \
>> +        LPAIF_CDC_INTF_REG(v, chan, dir, dai_id) : \
>> +        LPAIF_DMACTL_REG(v, chan, dir, dai_id))
>>     #define LPAIF_DMACTL_BURSTEN_SINGLE    0
>>   #define LPAIF_DMACTL_BURSTEN_INCR4    1
>>