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Fri, 7 Jun 2024 12:00:56 +0200 Received: from se-mail02w.axis.com (10.20.40.8) by SE-MAILARCH01W.axis.com (10.20.40.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 7 Jun 2024 12:00:55 +0200 Received: from se-intmail01x.se.axis.com (10.0.5.60) by se-mail02w.axis.com (10.20.40.8) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Fri, 7 Jun 2024 12:00:55 +0200 Received: from pc49102-2217.se.axis.com (pc49102-2217.se.axis.com [10.88.7.5]) by se-intmail01x.se.axis.com (Postfix) with ESMTP id D9CD332E4; Fri, 7 Jun 2024 12:00:55 +0200 (CEST) Received: by pc49102-2217.se.axis.com (Postfix, from userid 9470) id D2F356476FDC; Fri, 7 Jun 2024 12:00:55 +0200 (CEST) From: Ricard Wanderlof Subject: [PATCH v2 0/2] tlv320adc3xxx: Allow MICBIAS pins to be used as GPOs Date: Fri, 7 Jun 2024 12:00:44 +0200 Message-ID: <20240607-tlv320adc3xxx-micbias-gpo-v2-0-b140a45ffffe@axis.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAEzaYmYC/32NQQqDMBBFryKz7pSYaNGuvEdxESepDlQjiYQU8 e5NhW67fA/++zsE69kGuBc7eBs5sFsyyEsBNOlltMgmM0ghK1HLBrdXVFJoQyqlhDPTwDrguDo cmqEyJTXVzSjI+9XbJ6ez/egzTxw259/nVSy/9ldt/1RjiQKVEEa1ZInqutOJw5XcDP1xHB/DI +ymwQAAAA== To: Mark Brown , Liam Girdwood , Shenghao Ding , Kevin Lu , Baojun Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ricard Wanderlof , Jaroslav Kysela , Takashi Iwai CC: , , , , "Ricard Wanderlof" , X-Mailer: b4 0.13.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF00000190:EE_|PRAPR02MB7833:EE_ X-MS-Office365-Filtering-Correlation-Id: 01bba9b4-2942-4c67-b82a-08dc86d8b99e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: In some cases, depending on system design, the MICBIAS pins on the chip are not needed as such, but a couple of extra GPIO pins would be useful. This patch allows the MICBIAS pins to be configured in the device tree as general purpose output pins, controlled via the GPIO framework. Owing to their originally intended purpose there are some limitations: when the MICBIAS pins are deactivated, they will float, so will likely need a pulldown in many applications. When activated, they will assume the voltage specified by the micbias1-vg and micbias2-vg properties, respectively, meaning that the resulting output voltage will be 2.0 V, 2.5 V or AVDD . Signed-off-by: Ricard Wanderlof --- Changes in v2: - Corrected typo in yaml document for ti,micbias2-vg property reference - Added dependecies to yaml document for ti,micbias1-gio and ti,micbias2-gpo - Link to v1: https://lore.kernel.org/r/20240529-tlv320adc3xxx-micbias-gpo-v1-0-300d39cecc55@axis.com --- Ricard Wanderlof (2): ASoC: dt-bindings: tlv320adc3xxx: Add MICBIAS-as-GPO properties tlv320adc3xxx: Add support for using MICBIAS pins as GPO .../bindings/sound/ti,tlv320adc3xxx.yaml | 24 +++++ sound/soc/codecs/tlv320adc3xxx.c | 105 ++++++++++++++++----- 2 files changed, 108 insertions(+), 21 deletions(-) --- base-commit: 47d09270d7776e46858a161f94b735640b2fb056 change-id: 20240528-tlv320adc3xxx-micbias-gpo-b8b4d1c846d3 Best regards,