From patchwork Thu Nov 16 19:29:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 119083 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp5979311qgn; Thu, 16 Nov 2017 11:31:32 -0800 (PST) X-Google-Smtp-Source: AGs4zMaxcVSEiEvcJdqVGtECOeytuXT2v5AhHk+j7I+r04vK91gfa60G3dWmo901+81/zs5r0WKi X-Received: by 10.28.132.66 with SMTP id g63mr2277391wmd.22.1510860692752; Thu, 16 Nov 2017 11:31:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510860692; cv=none; d=google.com; s=arc-20160816; b=Ubrw5/dNCbqojdlh9ATsVyaqr1Sy1inWnTMDT5wKehS8VrVACg6T8D4h0JneNgdsC0 4NkrJAF5p9gsQ0k8MsfEl4wR0ZFmNjWddC+c1fzI41vK/zV+HLxlb6WKEJ6GknDXlUxK u3HIyXMaMNN+bOZbqN0DPLMLbFXs/7rtqoDo20Nj7djgbjW+KPm0AuUoDHkVRUrBVa6w 8cukR+nFnZWgDt7VDaz4FvBoGwBDPBGZu2dkDZPb4AhJq1iDdROZXMbo8Zh4yJhAqZQz MRbdm4BUiV0rh/Kh8nGQoRs6mgulfXt+b9HVEu/qmFdgeBrluRTf6gUBW5/xCY0Ce392 VdXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:date:message-id:in-reply-to:to:from :dkim-signature:delivered-to:arc-authentication-results; bh=5VXbV3Hm6V4hnzfmWHQWrtDasVwD1TIipZKqssTrZiY=; b=E1AYHrDqrXzmZ1EQdlTXHbFRN2YDqFYIgWWD3Xyo/jx6+4u9BAWYadfnUhHSlaokyo 0vsuCouhvvGkLoysVLrQRmOrqfD/t9Iu+6WUJkHsikmFlXhBmfqd3YDUh4sVih8XsmPY s6vVYE/v274uv/dYfEEwRn5p9rxjCwnq20G5At0v/6qIfnnZkX9lfpwDUzTPv8CrrwSG QKP92SQGEgH7hj8jWCTZKWEoYHMdxh355nJPQHFbcv1irKJO9sX9StnpgEXObV5Bw6f8 c1UowNLyQjS3z+E4p3K2M2R8U85XdhDeD36bDnQYwnFrG0iv/C2P8FnO1PyzqPRwmNxj ag1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=dMMyAJkT; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id 13si1598576wmm.173.2017.11.16.11.31.32; Thu, 16 Nov 2017 11:31:32 -0800 (PST) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=dMMyAJkT; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 5F03D2677D2; Thu, 16 Nov 2017 20:29:56 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 2BE8D2677CB; Thu, 16 Nov 2017 20:29:54 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: * X-Spam-Status: No, score=1.5 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,PRX_BODY_21,RP_MATCHES_RCVD,SPF_PASS autolearn=disabled version=3.4.0 Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id 2E772267799 for ; Thu, 16 Nov 2017 20:29:33 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=EV/vPda4hR9D3WWDxa2BrR8tGtORHZoP7AmmwSyBRRE=; b=dMMyAJkTINaR eqLb0bWuWS5Q3HJch/BmEFJLQqMEW/drQ/6Xix54Yysp/eIGSMX19UQleXKtksxE1TO4dIADk2l8k cBRVPjH7S76hBGqDrM/QmQniWUfCydGGjS+WyUoQPXomhD06JofFdmu7r0msJ5W5R/aOgAqckeb0P 3mJUs=; Received: from cpc102320-sgyl38-2-0-cust46.18-2.cable.virginm.net ([82.37.168.47] helo=finisterre.ee.mobilebroadband) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1eFPqu-0006Ic-Uv; Thu, 16 Nov 2017 19:29:33 +0000 Received: by finisterre.ee.mobilebroadband (Postfix, from userid 1000) id 8422244005B; Thu, 16 Nov 2017 19:29:32 +0000 (GMT) From: Mark Brown To: John Hsu In-Reply-To: <1510039399-12807-1-git-send-email-KCHSU0@nuvoton.com> Message-Id: <20171116192932.8422244005B@finisterre.ee.mobilebroadband> Date: Thu, 16 Nov 2017 19:29:32 +0000 (GMT) Cc: alsa-devel@alsa-project.org, WTLI@nuvoton.com, lgirdwood@gmail.com, YHCHuang@nuvoton.com, broonie@kernel.org, CTLIN0@nuvoton.com Subject: [alsa-devel] Applied "ASoC: nau8540: reset state machine for channel phase sync" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: nau8540: reset state machine for channel phase sync has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From e4d0db60e8d25cc62b9b7e32c18e7f6acc136055 Mon Sep 17 00:00:00 2001 From: John Hsu Date: Tue, 7 Nov 2017 15:23:17 +0800 Subject: [PATCH] ASoC: nau8540: reset state machine for channel phase sync The four channel ADCs in NAU85L40 have difference control registers, it is hard to synchronous these four channels without correct sequence. The phase difference will not be a constant and not to conjecture easily. It may be 2.55 degree, or more ,or less. Intended to prevent phase difference of channels, the solution as follows: (1)Channel_Sync need to be enabled. (2)Do soft reset without affecting register when recording done. Signed-off-by: John Hsu Signed-off-by: Mark Brown --- sound/soc/codecs/nau8540.c | 23 ++++++++++++++++++++--- sound/soc/codecs/nau8540.h | 1 + 2 files changed, 21 insertions(+), 3 deletions(-) -- 2.14.1 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/codecs/nau8540.c b/sound/soc/codecs/nau8540.c index f9c9933acffb..c10cbffa6314 100644 --- a/sound/soc/codecs/nau8540.c +++ b/sound/soc/codecs/nau8540.c @@ -233,6 +233,19 @@ static SOC_ENUM_SINGLE_DECL( static const struct snd_kcontrol_new digital_ch1_mux = SOC_DAPM_ENUM("Digital CH1 Select", digital_ch1_enum); +static int aiftx_power_control(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *k, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + if (SND_SOC_DAPM_EVENT_OFF(event)) { + regmap_write(nau8540->regmap, NAU8540_REG_RST, 0x0001); + regmap_write(nau8540->regmap, NAU8540_REG_RST, 0x0000); + } + return 0; +} + static const struct snd_soc_dapm_widget nau8540_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("MICBIAS2", NAU8540_REG_MIC_BIAS, 11, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MICBIAS1", NAU8540_REG_MIC_BIAS, 10, 0, NULL, 0), @@ -270,7 +283,8 @@ static const struct snd_soc_dapm_widget nau8540_dapm_widgets[] = { SND_SOC_DAPM_MUX("Digital CH1 Mux", SND_SOC_NOPM, 0, 0, &digital_ch1_mux), - SND_SOC_DAPM_AIF_OUT("AIFTX", "Capture", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT_E("AIFTX", "Capture", 0, SND_SOC_NOPM, 0, 0, + aiftx_power_control, SND_SOC_DAPM_POST_PMD), }; static const struct snd_soc_dapm_route nau8540_dapm_routes[] = { @@ -710,9 +724,12 @@ static void nau8540_init_regs(struct nau8540 *nau8540) regmap_update_bits(regmap, NAU8540_REG_CLOCK_CTRL, NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN, NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN); - /* ADC OSR selection, CLK_ADC = Fs * OSR */ + /* ADC OSR selection, CLK_ADC = Fs * OSR; + * Channel time alignment enable. + */ regmap_update_bits(regmap, NAU8540_REG_ADC_SAMPLE_RATE, - NAU8540_ADC_OSR_MASK, NAU8540_ADC_OSR_64); + NAU8540_CH_SYNC | NAU8540_ADC_OSR_MASK, + NAU8540_CH_SYNC | NAU8540_ADC_OSR_64); } static int __maybe_unused nau8540_suspend(struct snd_soc_codec *codec) diff --git a/sound/soc/codecs/nau8540.h b/sound/soc/codecs/nau8540.h index 5db5b224944d..14339f9bb01a 100644 --- a/sound/soc/codecs/nau8540.h +++ b/sound/soc/codecs/nau8540.h @@ -165,6 +165,7 @@ #define NAU8540_TDM_TX_MASK 0xf /* ADC_SAMPLE_RATE (0x3A) */ +#define NAU8540_CH_SYNC (0x1 << 14) #define NAU8540_ADC_OSR_MASK 0x3 #define NAU8540_ADC_OSR_256 0x3 #define NAU8540_ADC_OSR_128 0x2