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[92.40.169.63]) by smtp.gmail.com with ESMTPSA id w10-20020a05600c014a00b0039ee51fda45sm12789702wmm.2.2022.06.20.13.07.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jun 2022 13:07:22 -0700 (PDT) From: Aidan MacDonald To: broonie@kernel.org Subject: [PATCH 42/49] mfd: qcom-pm8008: Fix broken mask/unmask in irq chip Date: Mon, 20 Jun 2022 21:06:37 +0100 Message-Id: <20220620200644.1961936-43-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 22 Jun 2022 17:23:18 +0200 Cc: alsa-devel@alsa-project.org, bgoswami@codeaurora.org, rafael@kernel.org, linus.walleij@linaro.org, bjorn.andersson@linaro.org, srinivas.kandagatla@linaro.org, myungjoo.ham@samsung.com, lee.jones@linaro.org, samuel@sholland.org, maz@kernel.org, brgl@bgdev.pl, mani@kernel.org, krzysztof.kozlowski@linaro.org, jernej.skrabec@gmail.com, cw00.choi@samsung.com, wens@csie.org, agross@kernel.org, orsonzhai@gmail.com, linux-sunxi@lists.linux.dev, b.zolnierkie@samsung.com, linux-arm-msm@vger.kernel.org, tharvey@gateworks.com, linux-actions@lists.infradead.org, linux-gpio@vger.kernel.org, tiwai@suse.com, tglx@linutronix.de, cristian.ciocaltea@gmail.com, linux-arm-kernel@lists.infradead.org, rjones@gateworks.com, gregkh@linuxfoundation.org, lgirdwood@gmail.com, linux-kernel@vger.kernel.org, michael@walle.cc, zhang.lyra@gmail.com, baolin.wang7@gmail.com, mazziesaccount@gmail.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Swap mask_base and unmask_base, and drop the broken_mask_unmask flag since we're now expecting the registers to have their usual behavior. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 18095e72714e..7bc6becfe7f4 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -45,8 +45,8 @@ enum { #define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE #define PM8008_STATUS_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_STS_OFFSET) -#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) -#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) #define PM8008_TYPE_BASE (PM8008_PERIPH_0_BASE | INT_SET_TYPE_OFFSET) #define PM8008_ACK_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_CLR_OFFSET) #define PM8008_POLARITY_HI_BASE (PM8008_PERIPH_0_BASE | INT_POL_HIGH_OFFSET) @@ -141,7 +141,6 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, - .broken_mask_unmask = true, .ack_base = PM8008_ACK_BASE, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs),