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[209.132.180.131]) by mx.google.com with ESMTPS id ut4si13515087pbc.128.2015.11.11.08.10.38 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Nov 2015 08:10:39 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-return-89664-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of binutils-return-89664-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=binutils-return-89664-patch=linaro.org@sourceware.org; dkim=pass header.i=@sourceware.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-type; q=dns; s=default; b=QUflr NDk6gdVVktDaOTNvDC3FJkWIMQH+zcSMobGCnb72jicgDSqbKduHEz+avg9fOROr eDU8rjVXTu6dureQbyabxXRi7lHMdfLv5VyDt5eV+TKFTdzANDDR++twQCtS8rL+ FVuXO0K7ZcauXSa6vyWqxZYvZfR8DfSE9XkhQw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-type; s=default; bh=zhLIxnQ68nq MzyYi5eTQN/US0kQ=; b=YjHoukICnroD46g/0nrAu5lJkXlkBYx0qzHud2cOsnF hV/UJqKCkxNSooM532Us0v2Wp/hxgHHJmK6kV9+C6CUZaesS3k7naB+ChLEFSpQR ahXdD2VfosI5QA6wzYZs/046Ay+yV5afNx8LFfAAaCmHGb2F1wkuyIGFY1q5o06g = Received: (qmail 57367 invoked by alias); 11 Nov 2015 16:10:23 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Delivered-To: mailing list binutils@sourceware.org Received: (qmail 56300 invoked by uid 89); 11 Nov 2015 16:10:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 11 Nov 2015 16:10:22 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-30-inr84PqLRySSmns4qTaNiw-1; Wed, 11 Nov 2015 16:10:16 +0000 Received: from e107456-lin.cambridge.arm.com ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 11 Nov 2015 16:10:16 +0000 From: James Greenhalgh To: binutils@sourceware.org Cc: nickc@redhat.com, rearnsha@arm.com, ramana.radhakrishnan@arm.com Subject: [Patch Gas ARM] Add support for Cortex-A35 Date: Wed, 11 Nov 2015 16:09:48 +0000 Message-Id: <1447258188-11247-1-git-send-email-james.greenhalgh@arm.com> In-Reply-To: <1447258047-10763-1-git-send-email-james.greenhalgh@arm.com> References: <1447258047-10763-1-git-send-email-james.greenhalgh@arm.com> MIME-Version: 1.0 X-MC-Unique: inr84PqLRySSmns4qTaNiw-1 X-IsSubscribed: yes Hi, This patch adds support to the ARM back-end for the Cortex-A35 processor, as recently announced by ARM. The ARM Cortex-A35 provides full support for the ARMv8-A architecture, including the CRC extension. We set the default FPU for Cortex-A35 to FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 in the same fashion as for Cortex-A53 and Cortex-A57. Tested in a cross environment for arm-none-eabi with no issues. OK? If so, please apply it on my behalf as I don't have write permissions over here. Thanks, James --- 2015-11-11 James Greenhalgh * config/tc-arm.c (arm_cpus): Likewise. * doc/c-arm.texi (-mcpu=): Likewise. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index e33a77f..87021c3 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -24720,6 +24720,8 @@ static const struct arm_cpu_option_table arm_cpus[] = "Cortex-A15"), ARM_CPU_OPT ("cortex-a17", ARM_ARCH_V7VE, FPU_ARCH_NEON_VFP_V4, "Cortex-A17"), + ARM_CPU_OPT ("cortex-a35", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8, + "Cortex-A35"), ARM_CPU_OPT ("cortex-a53", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8, "Cortex-A53"), ARM_CPU_OPT ("cortex-a57", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8, diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 661f631..9a34f5e 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -119,6 +119,7 @@ recognized: @code{cortex-a8}, @code{cortex-a9}, @code{cortex-a15}, +@code{cortex-a35}, @code{cortex-a53}, @code{cortex-a57}, @code{cortex-a72},