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An overview of the ARMv8.3 architecture extension is at https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions gas/ 2016-11-07 Szabolcs Nagy * config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a". * doc/c-aarch64.texi (-march): Likewise. include/opcode/ 2016-11-07 Szabolcs Nagy * aarch64.h (AARCH64_FEATURE_V8_3): New. (AARCH64_ARCH_V8_3): New. (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 4ec1c8a..408fe28 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8371,6 +8371,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = { {"armv8-a", AARCH64_ARCH_V8}, {"armv8.1-a", AARCH64_ARCH_V8_1}, {"armv8.2-a", AARCH64_ARCH_V8_2}, + {"armv8.3-a", AARCH64_ARCH_V8_3}, {NULL, AARCH64_ARCH_NONE} }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 80b657b..c9a08f6 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -86,7 +86,7 @@ This option specifies the target architecture. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target architecture. The following architecture names are recognized: @code{armv8-a}, -@code{armv8.1-a} and @code{armv8.2-a}. +@code{armv8.1-a}, @code{armv8.2-a} and @code{armv8.3-a}. If both @option{-mcpu} and @option{-march} are specified, the assembler will use the setting for @option{-mcpu}. If neither are diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index defda78..6cda660 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -39,6 +39,7 @@ typedef uint32_t aarch64_insn; /* The following bitmasks control CPU features. */ #define AARCH64_FEATURE_V8 0x00000001 /* All processors. */ #define AARCH64_FEATURE_V8_2 0x00000020 /* ARMv8.2 processors. */ +#define AARCH64_FEATURE_V8_3 0x00000040 /* ARMv8.3 processors. */ #define AARCH64_FEATURE_CRYPTO 0x00010000 /* Crypto instructions. */ #define AARCH64_FEATURE_FP 0x00020000 /* FP instructions. */ #define AARCH64_FEATURE_SIMD 0x00040000 /* SIMD instructions. */ @@ -57,27 +58,19 @@ typedef uint32_t aarch64_insn; #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ AARCH64_FEATURE_FP \ | AARCH64_FEATURE_SIMD) -#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ - AARCH64_FEATURE_FP \ - | AARCH64_FEATURE_SIMD \ - | AARCH64_FEATURE_CRC \ +#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_ARCH_V8, \ + AARCH64_FEATURE_CRC \ | AARCH64_FEATURE_V8_1 \ | AARCH64_FEATURE_LSE \ | AARCH64_FEATURE_PAN \ | AARCH64_FEATURE_LOR \ | AARCH64_FEATURE_RDMA) -#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ +#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_ARCH_V8_1, \ AARCH64_FEATURE_V8_2 \ | AARCH64_FEATURE_F16 \ - | AARCH64_FEATURE_RAS \ - | AARCH64_FEATURE_FP \ - | AARCH64_FEATURE_SIMD \ - | AARCH64_FEATURE_CRC \ - | AARCH64_FEATURE_V8_1 \ - | AARCH64_FEATURE_LSE \ - | AARCH64_FEATURE_PAN \ - | AARCH64_FEATURE_LOR \ - | AARCH64_FEATURE_RDMA) + | AARCH64_FEATURE_RAS) +#define AARCH64_ARCH_V8_3 AARCH64_FEATURE (AARCH64_ARCH_V8_2, \ + AARCH64_FEATURE_V8_3) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) #define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */