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SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230022)(4636009)(376002)(346002)(396003)(136003)(39860400002)(451199015)(46966006)(40470700004)(36840700001)(2616005)(82740400003)(7636003)(70206006)(7696005)(40460700003)(4326008)(8676002)(26005)(40480700001)(70586007)(356005)(921005)(36756003)(83380400001)(478600001)(1076003)(316002)(110136005)(16526019)(336012)(47076005)(426003)(36860700001)(186003)(54906003)(82310400005)(8936002)(7416002)(7406005)(5660300002)(7366002)(2906002)(41300700001)(21314003)(2101003)(83996005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2022 03:27:56.4764 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 20d8c758-a3e9-403e-afa8-08daa6819884 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5932 Precedence: bulk List-ID: X-Mailing-List: ceph-devel@vger.kernel.org Use the block layer helper to initialize the common fields of tag_set such as blk_mq_ops, number of h/w queues, queue depth, command size, numa_node, timeout, BLK_MQ_F_XXX flags, driver data. This initialization is spread all over the block drivers. This avoids the code repetation of the inialization code of the tag set in current block drivers and any future ones. Signed-off-by: Chaitanya Kulkarni --- drivers/nvme/host/pci.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 7bbffd2a9beb..52af4b2bb668 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1757,15 +1757,9 @@ static int nvme_pci_alloc_admin_tag_set(struct nvme_dev *dev) { struct blk_mq_tag_set *set = &dev->admin_tagset; - set->ops = &nvme_mq_admin_ops; - set->nr_hw_queues = 1; - - set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; - set->timeout = NVME_ADMIN_TIMEOUT; - set->numa_node = dev->ctrl.numa_node; - set->cmd_size = sizeof(struct nvme_iod); - set->flags = BLK_MQ_F_NO_SCHED; - set->driver_data = dev; + blk_mq_init_tag_set(set, &nvme_mq_admin_ops, 1, NVME_AQ_MQ_TAG_DEPTH, + sizeof(struct nvme_iod), dev->ctrl.numa_node, + NVME_ADMIN_TIMEOUT, BLK_MQ_F_NO_SCHED, dev); if (blk_mq_alloc_tag_set(set)) return -ENOMEM; @@ -2528,20 +2522,15 @@ static void nvme_pci_alloc_tag_set(struct nvme_dev *dev) struct blk_mq_tag_set * set = &dev->tagset; int ret; - set->ops = &nvme_mq_ops; - set->nr_hw_queues = dev->online_queues - 1; set->nr_maps = 1; if (dev->io_queues[HCTX_TYPE_READ]) set->nr_maps = 2; if (dev->io_queues[HCTX_TYPE_POLL]) set->nr_maps = 3; - set->timeout = NVME_IO_TIMEOUT; - set->numa_node = dev->ctrl.numa_node; - set->queue_depth = min_t(unsigned, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; - set->cmd_size = sizeof(struct nvme_iod); - set->flags = BLK_MQ_F_SHOULD_MERGE; - set->driver_data = dev; - + blk_mq_init_tag_set(set, &nvme_mq_ops, dev->online_queues - 1, + min_t(unsigned, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1, + sizeof(struct nvme_iod), dev->ctrl.numa_node, + NVME_IO_TIMEOUT, BLK_MQ_F_SHOULD_MERGE, dev); /* * Some Apple controllers requires tags to be unique * across admin and IO queue, so reserve the first 32