From patchwork Fri May 3 12:29:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 163312 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp546788ill; Fri, 3 May 2019 05:31:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqyT5kRCJVm585UCQlqq3BJk7YM7owa+yePN7FhLTE18SD1qFHdLC/CXOQTXSh0S6R9KIDPp X-Received: by 2002:a17:902:b614:: with SMTP id b20mr9452885pls.200.1556886677666; Fri, 03 May 2019 05:31:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556886677; cv=none; d=google.com; s=arc-20160816; b=lomwwas5NbhR0EK4ueXQwflwqcw/4fnVqrT/SHZ25A98t1IcC8BmeXz5BBhsVGkZgT ZFmXytxqFo9L5EYLqVaMVLsUNHELOuXQ7C2vce/d2LAJItAtWfx/nArsS1jOecYkZbUq reQl56NHYG11nTkFwaMCp/GTvR7EymJ1Kii9DUIMcedFKYHZCm+TCzjXditJPef9sz4b 0zDiLsdlHDh257/UamEfpzdPjUEZ2c/UoMlu3Tg3Z8tYdbdXj6irx4xQQh+3SlQa4EOe OgQDRVxzCD4ifU7xiqzWUTZMNTEZnrRoc21+75pYP8KSiG4mUY9AbfTnwfb3Z29Jdy2k JRUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:delivered-to; bh=Cv95Y76Sw2ieCKmPJ2TZ4xe7M0E8gcmd1ZLT0l5Phu8=; b=PLz5oRJ4A2B+IPUfrNxatsc/uYlS9zzZ9u9xfng8v0CGfRCGSWVdhBfZU+2Ti4B6OU geCe9LRFUbD8XbjNKucl+qaR0CamN/wPsnuIKNpsyXY03oOZ/I8yjJHhTkzoQLhktYnt ifG8iERseoSGNje7Ig3vCwEmHybYEiVRxjdtswAA8wTroRtNXhEAGFT4MW6VxKm3UyDy 8Uk5dRkOH0B/V+5+19ZTOnqMyd3xIa62PDltwUyq7SASF/KdUWArR5os2SObV0nb5Atd HMXxpzGl6t/IWGbzAJVIblXiD2lTqGHAwkKHN9FFj1rC5i/cmogPJ1fDr77zX7x6vMPI a78g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id f6si2288990plf.90.2019.05.03.05.31.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 03 May 2019 05:31:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 609C589F01; Fri, 3 May 2019 12:31:16 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8299089F01 for ; Fri, 3 May 2019 12:31:15 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x43CVCwa095230; Fri, 3 May 2019 07:31:12 -0500 Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x43CVC3h121951 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 3 May 2019 07:31:12 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 3 May 2019 07:31:10 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 3 May 2019 07:31:10 -0500 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x43CUYtv002029; Fri, 3 May 2019 07:31:08 -0500 From: Tomi Valkeinen To: Andrzej Hajda , Laurent Pinchart , Lucas Stach , Andrey Gusakov , Philipp Zabel , Andrey Smirnov , Peter Ujfalusi , Jyri Sarha , Benoit Parrot , Subject: [PATCHv3 13/23] drm/bridge: tc358767: remove unnecessary msleep Date: Fri, 3 May 2019 15:29:39 +0300 Message-ID: <20190503122949.12266-14-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190503122949.12266-1-tomi.valkeinen@ti.com> References: <20190503122949.12266-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1556886672; bh=pDDzO/jPbrkRKCopvRcTDYyjV2PgCH6Qjag1F3IQaF0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZORd8Z36QGnlMUmq/iSUGOf5nYGhWwH11U7suDlwJngU222s7qZ9RNS1ry44kZTby GhUwpoao78M8cniHmm7ahSC77k09OT7NcMMBwotEPSYu3fVB5Bq07mFB9zFPpNabYo uzbLVoIGdqHT0dA2xN+wRBWYh2rEdRk/2l+vIZ7U= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For some reason the driver has a msleep(100) after writing to DP_PHY_CTRL. Toshiba's documentation doesn't suggest any delay is needed, and I have not seen any issues with the sleep removed. Drop it, as msleep(100) is a rather big one. Signed-off-by: Tomi Valkeinen Reviewed-by: Andrzej Hajda Reviewed-by: Andrey Gusakov --- drivers/gpu/drm/bridge/tc358767.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index cec825600158..ed348e09576a 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -874,7 +874,6 @@ static int tc_main_link_enable(struct tc_data *tc) if (tc->link.base.num_lanes == 2) dp_phy_ctrl |= PHY_2LANE; tc_write(DP_PHY_CTRL, dp_phy_ctrl); - msleep(100); /* PLL setup */ tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN);