From patchwork Thu Nov 10 10:40:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 81621 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp653354qge; Thu, 10 Nov 2016 02:40:55 -0800 (PST) X-Received: by 10.99.109.6 with SMTP id i6mr34291751pgc.139.1478774455724; Thu, 10 Nov 2016 02:40:55 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id q2si3468079pac.227.2016.11.10.02.40.55 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Nov 2016 02:40:55 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-440931-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-440931-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-440931-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=bCO6lbuOB/Unm9Ypu1fYd3ljNr14DffYkRzHLR5uP3DomVtZAx X2epm6g+PVVjJvXRJxLE8GwqKaYgOaKpRtiBRCxoK/tYxid5buahzCGCWNasv7s5 rn0evAsG499lAKBYUF5jo4pnoGB9M9VGp8dWYzhDYZoTg0s05heMxWqrk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=xkwcV8ZNdqoBeIipLaX0kRaJOmQ=; b=Cc4ydCjpn982siFg0WoY k7aZ4AMSLSbitBnRYS672ScQIFwO4kQIwfO2EtAK+CWwMqNB1eu77D0ztGCfislD 7O7dlF8wqPSxPesnVmap3aM6dUY46U+u8GVQvsJ6ZJquIi2kC9oQqmYjQ9ERellV U0sCDJiAhXdBzl2hpHzeAAE= Received: (qmail 4455 invoked by alias); 10 Nov 2016 10:40:34 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 4431 invoked by uid 89); 10 Nov 2016 10:40:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=multi-part, arm.opt, 3067, UD:arm.opt X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 10 Nov 2016 10:40:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D159528; Thu, 10 Nov 2016 02:40:20 -0800 (PST) Received: from [192.168.1.19] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9EAB43F24D; Thu, 10 Nov 2016 02:40:19 -0800 (PST) To: GCC Patches From: "Richard Earnshaw (lists)" Subject: [ARM] Remove duplicated enum type for CPU identifiers Message-ID: <2248b9bd-029b-6e68-6071-e7f1adf7ef17@arm.com> Date: Thu, 10 Nov 2016 10:40:17 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 Another minor cleanup. We currently have two enumeration types for the list of CPUs. This patch gets rid of one of them and merges the uses together. * arm.h (target_cpus): Delete. * arm-opts.h (enum processor_type): Prefix entries with TARGET_CPU_. * arm.c (all_cores): Prefix IDENT with TARGET_CPU_. (all_architectures): Likewise. (arm_option_override): Adjust use of CPU enums. (arm_sched_reorder): Likewise. * vfp.md (movdi_vfp, movdi_vfp_cortexa8): Likewise. * arm.opt (mcpu, mtune): Adjust use of CPU enums. * arm/genopt.sh (processor_type): Prefix enumeration entries with TARGET_CPU_. * arm-tables.opt: Regenerated. Installed on trunk. >From 7f6788b63cdade43b245d33df667bc5af73c11aa Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Wed, 9 Nov 2016 13:11:10 +0000 Subject: [PATCH] [ARM] Remove duplicated enum type for CPU identifiers. MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.7.4" This is a multi-part message in MIME format. --------------2.7.4 Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit * arm.h (target_cpus): Delete. * arm-opts.h (enum processor_type): Prefex entires with TARGET_CPU_. * arm.c (all_cores): Prefix IDENT with TARGET_CPU_. (all_architectures): Likewise. (arm_option_override): Adjust use of CPU enums. (arm_sched_reorder): Likewise. * vfp.md (movdi_vfp): Likewise. * arm.opt (mcpu, mtune): Adjust use of CPU enums. * arm/genopt.sh (processor_type): Prefix enumeration entries with TARGET_CPU_. * arm-tables.opt: Regenerated. --- gcc/config/arm/arm-opts.h | 4 +- gcc/config/arm/arm-tables.opt | 218 +++++++++++++++++++++--------------------- gcc/config/arm/arm.c | 16 ++-- gcc/config/arm/arm.h | 10 -- gcc/config/arm/arm.opt | 4 +- gcc/config/arm/genopt.sh | 2 +- gcc/config/arm/vfp.md | 4 +- 7 files changed, 124 insertions(+), 134 deletions(-) --------------2.7.4 Content-Type: text/x-patch; name="0001-ARM-Remove-duplicated-enum-type-for-CPU-identifiers.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0001-ARM-Remove-duplicated-enum-type-for-CPU-identifiers.patch" diff --git a/gcc/config/arm/arm-opts.h b/gcc/config/arm/arm-opts.h index a649ba5..9fa8113 100644 --- a/gcc/config/arm/arm-opts.h +++ b/gcc/config/arm/arm-opts.h @@ -30,11 +30,11 @@ enum processor_type { #undef ARM_CORE #define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \ - INTERNAL_IDENT, + TARGET_CPU_##INTERNAL_IDENT, #include "arm-cores.def" #undef ARM_CORE /* Used to indicate that no processor has been specified. */ - arm_none + TARGET_CPU_arm_none }; /* Which __fp16 format to use. diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index f7886b9..effdfbc 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -25,331 +25,331 @@ Name(processor_type) Type(enum processor_type) Known ARM CPUs (for use with the -mcpu= and -mtune= options): EnumValue -Enum(processor_type) String(arm2) Value(arm2) +Enum(processor_type) String(arm2) Value( TARGET_CPU_arm2) EnumValue -Enum(processor_type) String(arm250) Value(arm250) +Enum(processor_type) String(arm250) Value( TARGET_CPU_arm250) EnumValue -Enum(processor_type) String(arm3) Value(arm3) +Enum(processor_type) String(arm3) Value( TARGET_CPU_arm3) EnumValue -Enum(processor_type) String(arm6) Value(arm6) +Enum(processor_type) String(arm6) Value( TARGET_CPU_arm6) EnumValue -Enum(processor_type) String(arm60) Value(arm60) +Enum(processor_type) String(arm60) Value( TARGET_CPU_arm60) EnumValue -Enum(processor_type) String(arm600) Value(arm600) +Enum(processor_type) String(arm600) Value( TARGET_CPU_arm600) EnumValue -Enum(processor_type) String(arm610) Value(arm610) +Enum(processor_type) String(arm610) Value( TARGET_CPU_arm610) EnumValue -Enum(processor_type) String(arm620) Value(arm620) +Enum(processor_type) String(arm620) Value( TARGET_CPU_arm620) EnumValue -Enum(processor_type) String(arm7) Value(arm7) +Enum(processor_type) String(arm7) Value( TARGET_CPU_arm7) EnumValue -Enum(processor_type) String(arm7d) Value(arm7d) +Enum(processor_type) String(arm7d) Value( TARGET_CPU_arm7d) EnumValue -Enum(processor_type) String(arm7di) Value(arm7di) +Enum(processor_type) String(arm7di) Value( TARGET_CPU_arm7di) EnumValue -Enum(processor_type) String(arm70) Value(arm70) +Enum(processor_type) String(arm70) Value( TARGET_CPU_arm70) EnumValue -Enum(processor_type) String(arm700) Value(arm700) +Enum(processor_type) String(arm700) Value( TARGET_CPU_arm700) EnumValue -Enum(processor_type) String(arm700i) Value(arm700i) +Enum(processor_type) String(arm700i) Value( TARGET_CPU_arm700i) EnumValue -Enum(processor_type) String(arm710) Value(arm710) +Enum(processor_type) String(arm710) Value( TARGET_CPU_arm710) EnumValue -Enum(processor_type) String(arm720) Value(arm720) +Enum(processor_type) String(arm720) Value( TARGET_CPU_arm720) EnumValue -Enum(processor_type) String(arm710c) Value(arm710c) +Enum(processor_type) String(arm710c) Value( TARGET_CPU_arm710c) EnumValue -Enum(processor_type) String(arm7100) Value(arm7100) +Enum(processor_type) String(arm7100) Value( TARGET_CPU_arm7100) EnumValue -Enum(processor_type) String(arm7500) Value(arm7500) +Enum(processor_type) String(arm7500) Value( TARGET_CPU_arm7500) EnumValue -Enum(processor_type) String(arm7500fe) Value(arm7500fe) +Enum(processor_type) String(arm7500fe) Value( TARGET_CPU_arm7500fe) EnumValue -Enum(processor_type) String(arm7m) Value(arm7m) +Enum(processor_type) String(arm7m) Value( TARGET_CPU_arm7m) EnumValue -Enum(processor_type) String(arm7dm) Value(arm7dm) +Enum(processor_type) String(arm7dm) Value( TARGET_CPU_arm7dm) EnumValue -Enum(processor_type) String(arm7dmi) Value(arm7dmi) +Enum(processor_type) String(arm7dmi) Value( TARGET_CPU_arm7dmi) EnumValue -Enum(processor_type) String(arm8) Value(arm8) +Enum(processor_type) String(arm8) Value( TARGET_CPU_arm8) EnumValue -Enum(processor_type) String(arm810) Value(arm810) +Enum(processor_type) String(arm810) Value( TARGET_CPU_arm810) EnumValue -Enum(processor_type) String(strongarm) Value(strongarm) +Enum(processor_type) String(strongarm) Value( TARGET_CPU_strongarm) EnumValue -Enum(processor_type) String(strongarm110) Value(strongarm110) +Enum(processor_type) String(strongarm110) Value( TARGET_CPU_strongarm110) EnumValue -Enum(processor_type) String(strongarm1100) Value(strongarm1100) +Enum(processor_type) String(strongarm1100) Value( TARGET_CPU_strongarm1100) EnumValue -Enum(processor_type) String(strongarm1110) Value(strongarm1110) +Enum(processor_type) String(strongarm1110) Value( TARGET_CPU_strongarm1110) EnumValue -Enum(processor_type) String(fa526) Value(fa526) +Enum(processor_type) String(fa526) Value( TARGET_CPU_fa526) EnumValue -Enum(processor_type) String(fa626) Value(fa626) +Enum(processor_type) String(fa626) Value( TARGET_CPU_fa626) EnumValue -Enum(processor_type) String(arm7tdmi) Value(arm7tdmi) +Enum(processor_type) String(arm7tdmi) Value( TARGET_CPU_arm7tdmi) EnumValue -Enum(processor_type) String(arm7tdmi-s) Value(arm7tdmis) +Enum(processor_type) String(arm7tdmi-s) Value( TARGET_CPU_arm7tdmis) EnumValue -Enum(processor_type) String(arm710t) Value(arm710t) +Enum(processor_type) String(arm710t) Value( TARGET_CPU_arm710t) EnumValue -Enum(processor_type) String(arm720t) Value(arm720t) +Enum(processor_type) String(arm720t) Value( TARGET_CPU_arm720t) EnumValue -Enum(processor_type) String(arm740t) Value(arm740t) +Enum(processor_type) String(arm740t) Value( TARGET_CPU_arm740t) EnumValue -Enum(processor_type) String(arm9) Value(arm9) +Enum(processor_type) String(arm9) Value( TARGET_CPU_arm9) EnumValue -Enum(processor_type) String(arm9tdmi) Value(arm9tdmi) +Enum(processor_type) String(arm9tdmi) Value( TARGET_CPU_arm9tdmi) EnumValue -Enum(processor_type) String(arm920) Value(arm920) +Enum(processor_type) String(arm920) Value( TARGET_CPU_arm920) EnumValue -Enum(processor_type) String(arm920t) Value(arm920t) +Enum(processor_type) String(arm920t) Value( TARGET_CPU_arm920t) EnumValue -Enum(processor_type) String(arm922t) Value(arm922t) +Enum(processor_type) String(arm922t) Value( TARGET_CPU_arm922t) EnumValue -Enum(processor_type) String(arm940t) Value(arm940t) +Enum(processor_type) String(arm940t) Value( TARGET_CPU_arm940t) EnumValue -Enum(processor_type) String(ep9312) Value(ep9312) +Enum(processor_type) String(ep9312) Value( TARGET_CPU_ep9312) EnumValue -Enum(processor_type) String(arm10tdmi) Value(arm10tdmi) +Enum(processor_type) String(arm10tdmi) Value( TARGET_CPU_arm10tdmi) EnumValue -Enum(processor_type) String(arm1020t) Value(arm1020t) +Enum(processor_type) String(arm1020t) Value( TARGET_CPU_arm1020t) EnumValue -Enum(processor_type) String(arm9e) Value(arm9e) +Enum(processor_type) String(arm9e) Value( TARGET_CPU_arm9e) EnumValue -Enum(processor_type) String(arm946e-s) Value(arm946es) +Enum(processor_type) String(arm946e-s) Value( TARGET_CPU_arm946es) EnumValue -Enum(processor_type) String(arm966e-s) Value(arm966es) +Enum(processor_type) String(arm966e-s) Value( TARGET_CPU_arm966es) EnumValue -Enum(processor_type) String(arm968e-s) Value(arm968es) +Enum(processor_type) String(arm968e-s) Value( TARGET_CPU_arm968es) EnumValue -Enum(processor_type) String(arm10e) Value(arm10e) +Enum(processor_type) String(arm10e) Value( TARGET_CPU_arm10e) EnumValue -Enum(processor_type) String(arm1020e) Value(arm1020e) +Enum(processor_type) String(arm1020e) Value( TARGET_CPU_arm1020e) EnumValue -Enum(processor_type) String(arm1022e) Value(arm1022e) +Enum(processor_type) String(arm1022e) Value( TARGET_CPU_arm1022e) EnumValue -Enum(processor_type) String(xscale) Value(xscale) +Enum(processor_type) String(xscale) Value( TARGET_CPU_xscale) EnumValue -Enum(processor_type) String(iwmmxt) Value(iwmmxt) +Enum(processor_type) String(iwmmxt) Value( TARGET_CPU_iwmmxt) EnumValue -Enum(processor_type) String(iwmmxt2) Value(iwmmxt2) +Enum(processor_type) String(iwmmxt2) Value( TARGET_CPU_iwmmxt2) EnumValue -Enum(processor_type) String(fa606te) Value(fa606te) +Enum(processor_type) String(fa606te) Value( TARGET_CPU_fa606te) EnumValue -Enum(processor_type) String(fa626te) Value(fa626te) +Enum(processor_type) String(fa626te) Value( TARGET_CPU_fa626te) EnumValue -Enum(processor_type) String(fmp626) Value(fmp626) +Enum(processor_type) String(fmp626) Value( TARGET_CPU_fmp626) EnumValue -Enum(processor_type) String(fa726te) Value(fa726te) +Enum(processor_type) String(fa726te) Value( TARGET_CPU_fa726te) EnumValue -Enum(processor_type) String(arm926ej-s) Value(arm926ejs) +Enum(processor_type) String(arm926ej-s) Value( TARGET_CPU_arm926ejs) EnumValue -Enum(processor_type) String(arm1026ej-s) Value(arm1026ejs) +Enum(processor_type) String(arm1026ej-s) Value( TARGET_CPU_arm1026ejs) EnumValue -Enum(processor_type) String(arm1136j-s) Value(arm1136js) +Enum(processor_type) String(arm1136j-s) Value( TARGET_CPU_arm1136js) EnumValue -Enum(processor_type) String(arm1136jf-s) Value(arm1136jfs) +Enum(processor_type) String(arm1136jf-s) Value( TARGET_CPU_arm1136jfs) EnumValue -Enum(processor_type) String(arm1176jz-s) Value(arm1176jzs) +Enum(processor_type) String(arm1176jz-s) Value( TARGET_CPU_arm1176jzs) EnumValue -Enum(processor_type) String(arm1176jzf-s) Value(arm1176jzfs) +Enum(processor_type) String(arm1176jzf-s) Value( TARGET_CPU_arm1176jzfs) EnumValue -Enum(processor_type) String(mpcorenovfp) Value(mpcorenovfp) +Enum(processor_type) String(mpcorenovfp) Value( TARGET_CPU_mpcorenovfp) EnumValue -Enum(processor_type) String(mpcore) Value(mpcore) +Enum(processor_type) String(mpcore) Value( TARGET_CPU_mpcore) EnumValue -Enum(processor_type) String(arm1156t2-s) Value(arm1156t2s) +Enum(processor_type) String(arm1156t2-s) Value( TARGET_CPU_arm1156t2s) EnumValue -Enum(processor_type) String(arm1156t2f-s) Value(arm1156t2fs) +Enum(processor_type) String(arm1156t2f-s) Value( TARGET_CPU_arm1156t2fs) EnumValue -Enum(processor_type) String(cortex-m1) Value(cortexm1) +Enum(processor_type) String(cortex-m1) Value( TARGET_CPU_cortexm1) EnumValue -Enum(processor_type) String(cortex-m0) Value(cortexm0) +Enum(processor_type) String(cortex-m0) Value( TARGET_CPU_cortexm0) EnumValue -Enum(processor_type) String(cortex-m0plus) Value(cortexm0plus) +Enum(processor_type) String(cortex-m0plus) Value( TARGET_CPU_cortexm0plus) EnumValue -Enum(processor_type) String(cortex-m1.small-multiply) Value(cortexm1smallmultiply) +Enum(processor_type) String(cortex-m1.small-multiply) Value( TARGET_CPU_cortexm1smallmultiply) EnumValue -Enum(processor_type) String(cortex-m0.small-multiply) Value(cortexm0smallmultiply) +Enum(processor_type) String(cortex-m0.small-multiply) Value( TARGET_CPU_cortexm0smallmultiply) EnumValue -Enum(processor_type) String(cortex-m0plus.small-multiply) Value(cortexm0plussmallmultiply) +Enum(processor_type) String(cortex-m0plus.small-multiply) Value( TARGET_CPU_cortexm0plussmallmultiply) EnumValue -Enum(processor_type) String(generic-armv7-a) Value(genericv7a) +Enum(processor_type) String(generic-armv7-a) Value( TARGET_CPU_genericv7a) EnumValue -Enum(processor_type) String(cortex-a5) Value(cortexa5) +Enum(processor_type) String(cortex-a5) Value( TARGET_CPU_cortexa5) EnumValue -Enum(processor_type) String(cortex-a7) Value(cortexa7) +Enum(processor_type) String(cortex-a7) Value( TARGET_CPU_cortexa7) EnumValue -Enum(processor_type) String(cortex-a8) Value(cortexa8) +Enum(processor_type) String(cortex-a8) Value( TARGET_CPU_cortexa8) EnumValue -Enum(processor_type) String(cortex-a9) Value(cortexa9) +Enum(processor_type) String(cortex-a9) Value( TARGET_CPU_cortexa9) EnumValue -Enum(processor_type) String(cortex-a12) Value(cortexa12) +Enum(processor_type) String(cortex-a12) Value( TARGET_CPU_cortexa12) EnumValue -Enum(processor_type) String(cortex-a15) Value(cortexa15) +Enum(processor_type) String(cortex-a15) Value( TARGET_CPU_cortexa15) EnumValue -Enum(processor_type) String(cortex-a17) Value(cortexa17) +Enum(processor_type) String(cortex-a17) Value( TARGET_CPU_cortexa17) EnumValue -Enum(processor_type) String(cortex-r4) Value(cortexr4) +Enum(processor_type) String(cortex-r4) Value( TARGET_CPU_cortexr4) EnumValue -Enum(processor_type) String(cortex-r4f) Value(cortexr4f) +Enum(processor_type) String(cortex-r4f) Value( TARGET_CPU_cortexr4f) EnumValue -Enum(processor_type) String(cortex-r5) Value(cortexr5) +Enum(processor_type) String(cortex-r5) Value( TARGET_CPU_cortexr5) EnumValue -Enum(processor_type) String(cortex-r7) Value(cortexr7) +Enum(processor_type) String(cortex-r7) Value( TARGET_CPU_cortexr7) EnumValue -Enum(processor_type) String(cortex-r8) Value(cortexr8) +Enum(processor_type) String(cortex-r8) Value( TARGET_CPU_cortexr8) EnumValue -Enum(processor_type) String(cortex-m7) Value(cortexm7) +Enum(processor_type) String(cortex-m7) Value( TARGET_CPU_cortexm7) EnumValue -Enum(processor_type) String(cortex-m4) Value(cortexm4) +Enum(processor_type) String(cortex-m4) Value( TARGET_CPU_cortexm4) EnumValue -Enum(processor_type) String(cortex-m3) Value(cortexm3) +Enum(processor_type) String(cortex-m3) Value( TARGET_CPU_cortexm3) EnumValue -Enum(processor_type) String(marvell-pj4) Value(marvell_pj4) +Enum(processor_type) String(marvell-pj4) Value( TARGET_CPU_marvell_pj4) EnumValue -Enum(processor_type) String(cortex-a15.cortex-a7) Value(cortexa15cortexa7) +Enum(processor_type) String(cortex-a15.cortex-a7) Value( TARGET_CPU_cortexa15cortexa7) EnumValue -Enum(processor_type) String(cortex-a17.cortex-a7) Value(cortexa17cortexa7) +Enum(processor_type) String(cortex-a17.cortex-a7) Value( TARGET_CPU_cortexa17cortexa7) EnumValue -Enum(processor_type) String(cortex-m23) Value(cortexm23) +Enum(processor_type) String(cortex-m23) Value( TARGET_CPU_cortexm23) EnumValue -Enum(processor_type) String(cortex-a32) Value(cortexa32) +Enum(processor_type) String(cortex-a32) Value( TARGET_CPU_cortexa32) EnumValue -Enum(processor_type) String(cortex-m33) Value(cortexm33) +Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33) EnumValue -Enum(processor_type) String(cortex-a35) Value(cortexa35) +Enum(processor_type) String(cortex-a35) Value( TARGET_CPU_cortexa35) EnumValue -Enum(processor_type) String(cortex-a53) Value(cortexa53) +Enum(processor_type) String(cortex-a53) Value( TARGET_CPU_cortexa53) EnumValue -Enum(processor_type) String(cortex-a57) Value(cortexa57) +Enum(processor_type) String(cortex-a57) Value( TARGET_CPU_cortexa57) EnumValue -Enum(processor_type) String(cortex-a72) Value(cortexa72) +Enum(processor_type) String(cortex-a72) Value( TARGET_CPU_cortexa72) EnumValue -Enum(processor_type) String(cortex-a73) Value(cortexa73) +Enum(processor_type) String(cortex-a73) Value( TARGET_CPU_cortexa73) EnumValue -Enum(processor_type) String(exynos-m1) Value(exynosm1) +Enum(processor_type) String(exynos-m1) Value( TARGET_CPU_exynosm1) EnumValue -Enum(processor_type) String(qdf24xx) Value(qdf24xx) +Enum(processor_type) String(qdf24xx) Value( TARGET_CPU_qdf24xx) EnumValue -Enum(processor_type) String(xgene1) Value(xgene1) +Enum(processor_type) String(xgene1) Value( TARGET_CPU_xgene1) EnumValue -Enum(processor_type) String(cortex-a57.cortex-a53) Value(cortexa57cortexa53) +Enum(processor_type) String(cortex-a57.cortex-a53) Value( TARGET_CPU_cortexa57cortexa53) EnumValue -Enum(processor_type) String(cortex-a72.cortex-a53) Value(cortexa72cortexa53) +Enum(processor_type) String(cortex-a72.cortex-a53) Value( TARGET_CPU_cortexa72cortexa53) EnumValue -Enum(processor_type) String(cortex-a73.cortex-a35) Value(cortexa73cortexa35) +Enum(processor_type) String(cortex-a73.cortex-a35) Value( TARGET_CPU_cortexa73cortexa35) EnumValue -Enum(processor_type) String(cortex-a73.cortex-a53) Value(cortexa73cortexa53) +Enum(processor_type) String(cortex-a73.cortex-a53) Value( TARGET_CPU_cortexa73cortexa53) Enum Name(arm_arch) Type(int) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 13f61f4..239117f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -754,7 +754,7 @@ extern FILE * asm_out_file; int making_const_table; /* The processor for which instructions should be scheduled. */ -enum processor_type arm_tune = arm_none; +enum processor_type arm_tune = TARGET_CPU_arm_none; /* The current tuning set. */ const struct tune_params *current_tune; @@ -2272,11 +2272,11 @@ static const struct processors all_cores[] = { /* ARM Cores */ #define ARM_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \ - {NAME, IDENT, #ARCH, BASE_ARCH_##ARCH, \ + {NAME, TARGET_CPU_##IDENT, #ARCH, BASE_ARCH_##ARCH, \ FLAGS, &arm_##COSTS##_tune}, #include "arm-cores.def" #undef ARM_CORE - {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL} + {NULL, TARGET_CPU_arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL} }; static const struct processors all_architectures[] = @@ -2286,10 +2286,10 @@ static const struct processors all_architectures[] = from the core. */ #define ARM_ARCH(NAME, CORE, ARCH, FLAGS) \ - {NAME, CORE, #ARCH, BASE_ARCH_##ARCH, FLAGS, NULL}, + {NAME, TARGET_CPU_##CORE, #ARCH, BASE_ARCH_##ARCH, FLAGS, NULL}, #include "arm-arches.def" #undef ARM_ARCH - {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL} + {NULL, TARGET_CPU_arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL} }; @@ -3219,7 +3219,7 @@ arm_option_override (void) arm_arch_thumb_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB_DIV); arm_arch_arm_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARM_DIV); arm_arch_no_volatile_ce = ARM_FSET_HAS_CPU1 (insn_flags, FL_NO_VOLATILE_CE); - arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; + arm_tune_cortex_a9 = (arm_tune == TARGET_CPU_cortexa9) != 0; arm_arch_crc = ARM_FSET_HAS_CPU1 (insn_flags, FL_CRC32); arm_m_profile_small_mul = ARM_FSET_HAS_CPU1 (insn_flags, FL_SMALLMUL); arm_fp16_inst = ARM_FSET_HAS_CPU2 (insn_flags, FL2_FP16INST); @@ -3387,7 +3387,7 @@ arm_option_override (void) /* Enable -mfix-cortex-m3-ldrd by default for Cortex-M3 cores. */ if (fix_cm3_ldrd == 2) { - if (arm_selected_cpu->core == cortexm3) + if (arm_selected_cpu->core == TARGET_CPU_cortexm3) fix_cm3_ldrd = 1; else fix_cm3_ldrd = 0; @@ -10948,7 +10948,7 @@ arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp, { switch (arm_tune) { - case cortexa7: + case TARGET_CPU_cortexa7: cortexa7_sched_reorder (file, verbose, ready, n_readyp, clock); break; default: diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 3d11555..c8d7462 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -49,16 +49,6 @@ extern char arm_arch_name[]; #include "config/arm/arm-opts.h" -enum target_cpus -{ -#define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \ - TARGET_CPU_##INTERNAL_IDENT, -#include "arm-cores.def" -#undef ARM_CORE - /* Total number of CPUs we handle. */ - TARGET_CPU_num_cores -}; - /* The processor for which instructions should be scheduled. */ extern enum processor_type arm_tune; diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 54d84dc..0fcabb9 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -102,7 +102,7 @@ Target Report Mask(CALLER_INTERWORKING) Thumb: Assume function pointers may go to non-Thumb aware code. mcpu= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none) +Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(TARGET_CPU_arm_none) Specify the name of the target CPU. mfloat-abi= @@ -223,7 +223,7 @@ Target Report Mask(TPCS_LEAF_FRAME) Thumb: Generate (leaf) stack frames even if not needed. mtune= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none) +Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(TARGET_CPU_arm_none) Tune code for the given processor. mprint-tune-info diff --git a/gcc/config/arm/genopt.sh b/gcc/config/arm/genopt.sh index 9e97342..82e5436 100755 --- a/gcc/config/arm/genopt.sh +++ b/gcc/config/arm/genopt.sh @@ -52,7 +52,7 @@ awk -F'[(, ]+' '/^ARM_CORE/ { enum = $3 gsub("\"", "", name) print "EnumValue" - print "Enum(processor_type) String(" name ") Value(" enum ")" + print "Enum(processor_type) String(" name ") Value( TARGET_CPU_" enum ")" print "" }' $1/arm-cores.def diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 45ce5c9..2051f10 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -306,7 +306,7 @@ (define_insn "*thumb2_movsi_vfp" (define_insn "*movdi_vfp" [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,r,w,w, Uv") (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,q,r,w,w,Uvi,w"))] - "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune != cortexa8 + "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune != TARGET_CPU_cortexa8 && ( register_operand (operands[0], DImode) || register_operand (operands[1], DImode)) && !(TARGET_NEON && CONST_INT_P (operands[1]) @@ -357,7 +357,7 @@ (define_insn "*movdi_vfp" (define_insn "*movdi_vfp_cortexa8" [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv") (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] - "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune == cortexa8 + "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune == TARGET_CPU_cortexa8 && ( register_operand (operands[0], DImode) || register_operand (operands[1], DImode)) && !(TARGET_NEON && CONST_INT_P (operands[1]) --------------2.7.4--