From patchwork Wed Feb 29 15:13:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 7007 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 43E7B23DEE for ; Wed, 29 Feb 2012 15:13:28 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id F105AA18153 for ; Wed, 29 Feb 2012 15:13:27 +0000 (UTC) Received: by yhpp61 with SMTP id p61so2356842yhp.11 for ; Wed, 29 Feb 2012 07:13:27 -0800 (PST) Received: from mr.google.com ([10.50.95.230]) by 10.50.95.230 with SMTP id dn6mr6872954igb.0.1330528407344 (num_hops = 1); Wed, 29 Feb 2012 07:13:27 -0800 (PST) Received: by 10.50.95.230 with SMTP id dn6mr5628774igb.0.1330528407265; Wed, 29 Feb 2012 07:13:27 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp5236ibg; Wed, 29 Feb 2012 07:13:26 -0800 (PST) Received: by 10.224.203.6 with SMTP id fg6mr2601791qab.94.1330528405339; Wed, 29 Feb 2012 07:13:25 -0800 (PST) Received: from mail-qw0-f50.google.com (mail-qw0-f50.google.com [209.85.216.50]) by mx.google.com with ESMTPS id fz1si19712729qab.34.2012.02.29.07.13.24 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 29 Feb 2012 07:13:25 -0800 (PST) Received-SPF: neutral (google.com: 209.85.216.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=209.85.216.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.216.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by qabg27 with SMTP id g27so2608652qab.16 for ; Wed, 29 Feb 2012 07:13:24 -0800 (PST) Received-SPF: pass (google.com: domain of ramana.radhakrishnan@linaro.org designates 10.224.96.9 as permitted sender) client-ip=10.224.96.9; Received: from mr.google.com ([10.224.96.9]) by 10.224.96.9 with SMTP id f9mr3316726qan.36.1330528404966 (num_hops = 1); Wed, 29 Feb 2012 07:13:24 -0800 (PST) MIME-Version: 1.0 Received: by 10.224.96.9 with SMTP id f9mr2750608qan.36.1330528404867; Wed, 29 Feb 2012 07:13:24 -0800 (PST) Received: by 10.224.95.196 with HTTP; Wed, 29 Feb 2012 07:13:24 -0800 (PST) Date: Wed, 29 Feb 2012 15:13:24 +0000 Message-ID: Subject: [Patch ARM] Turn on hot cold partitioning. From: Ramana Radhakrishnan To: gcc-patches Cc: Patch Tracking , Richard Earnshaw X-Gm-Message-State: ALoCoQkn+5ZFXFkVwg6IyLvZpTD6IsOtRsYoY8svJHswe2YpUO/G4yVEk07tCDzrtfcB8sPlxl4O Hi , This patch turns on hot cold partitioning for the ARM target. Given that NOTE_INSN_SWITCH_SECTIONS gets created once - we should see that this works. Passed testing with cross on qemu - Simple handwritten tests for this appear to work. I'll commit this for 4.8 and would like some feedback for this. regards, Ramana 2012-02-29 Ramana Radhakrishnan * config/arm/arm.c (arm_option_override): Allow hot cold partitioning. (arm_reorg): Handle NOTE_INSN_SWITCH_TEXT_SECTIONS. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b58877b..b9fd116 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1976,16 +1976,6 @@ arm_option_override (void) else max_insns_skipped = current_tune->max_insns_skipped; - /* Hot/Cold partitioning is not currently supported, since we can't - handle literal pool placement in that case. */ - if (flag_reorder_blocks_and_partition) - { - inform (input_location, - "-freorder-blocks-and-partition not supported on this architecture"); - flag_reorder_blocks_and_partition = 0; - flag_reorder_blocks = 1; - } - if (flag_pic) /* Hoisting PIC address calculations more aggressively provides a small, but measurable, size reduction for PIC code. Therefore, we decrease @@ -13332,8 +13322,21 @@ arm_reorg (void) minipool_pad = 0; /* Scan all the insns and record the operands that will need fixing. */ - for (insn = next_nonnote_insn (insn); insn; insn = next_nonnote_insn (insn)) + for (insn = next_nondebug_insn (insn); insn; insn = next_nondebug_insn (insn)) { + if (NOTE_P (insn)) + { + if (NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) + { + /* Given we cannot address a range greater than 4M go + ahead and increase the address sky high to force + all pools before this note to be dumped. */ + address += 0x400000; + } + else + continue; + } + if (TARGET_CIRRUS_FIX_INVALID_INSNS && (arm_cirrus_insn_p (insn) || GET_CODE (insn) == JUMP_INSN