Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi	(revision 216416)
+++ doc/invoke.texi	(working copy)
@@ -11808,7 +11808,7 @@ architecture.
 @opindex mtune
 Specify the name of the target processor for which GCC should tune the
 performance of the code.  Permissible values for this option are:
-@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}.
+@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{thunderx}.
 
 Additionally, this option can specify that GCC should tune the performance
 of the code for a big.LITTLE system.  The only permissible value is
Index: config/aarch64/aarch64-cost-tables.h
===================================================================
--- config/aarch64/aarch64-cost-tables.h	(revision 0)
+++ config/aarch64/aarch64-cost-tables.h	(revision 0)
@@ -0,0 +1,131 @@
+/* RTX cost tables for aarch64.
+
+   Copyright (C) 2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_AARCH64_COST_TABLES_H
+#define GCC_AARCH64_COST_TABLES_H
+
+#include "config/arm/aarch-cost-tables.h"
+
+/* ThunderX does not have implement AARCH32.  */
+const struct cpu_cost_table thunderx_extra_costs =
+{
+  /* ALU */
+  {
+    0,			/* Arith.  */
+    0,			/* Logical.  */
+    0,			/* Shift.  */
+    0,			/* Shift_reg.  */
+    COSTS_N_INSNS (1),	/* Arith_shift.  */
+    COSTS_N_INSNS (1),	/* Arith_shift_reg.  */
+    COSTS_N_INSNS (1),	/* UNUSED: Log_shift.  */
+    COSTS_N_INSNS (1),	/* UNUSED: Log_shift_reg.  */
+    0,			/* Extend.  */
+    COSTS_N_INSNS (1),	/* Extend_arith.  */
+    0,			/* Bfi.  */
+    0,			/* Bfx.  */
+    COSTS_N_INSNS (5),	/* Clz.  */
+    0,			/* rev.  */
+    0,			/* UNUSED: non_exec.  */
+    false		/* UNUSED: non_exec_costs_exec.  */
+  },
+  {
+    /* MULT SImode */
+    {
+      COSTS_N_INSNS (3),	/* Simple.  */
+      0,			/* Flag_setting.  */
+      0,			/* Extend.  */
+      0,			/* Add.  */
+      COSTS_N_INSNS (1),	/* Extend_add.  */
+      COSTS_N_INSNS (21)	/* Idiv.  */
+    },
+    /* MULT DImode */
+    {
+      COSTS_N_INSNS (3),	/* Simple.  */
+      0,			/* Flag_setting.  */
+      0,			/* Extend.  */
+      0,			/* Add.  */
+      COSTS_N_INSNS (1),	/* Extend_add.  */
+      COSTS_N_INSNS (37)	/* Idiv.  */
+    },
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (2),	/* Load.  */
+    COSTS_N_INSNS (2),	/* Load_sign_extend.  */
+    COSTS_N_INSNS (2),	/* Ldrd.  */
+    0,			/* N/A: Ldm_1st.  */
+    0,			/* N/A: Ldm_regs_per_insn_1st.  */
+    0,			/* N/A: Ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (3),	/* Loadf.  */
+    COSTS_N_INSNS (3),	/* Loadd.  */
+    0,  		/* N/A: Load_unaligned.  */
+    0,			/* Store.  */
+    0,			/* Strd.  */
+    0,			/* N/A: Stm_1st.  */
+    0,			/* N/A: Stm_regs_per_insn_1st.  */
+    0,			/* N/A: Stm_regs_per_insn_subsequent.  */
+    0,			/* Storef.  */
+    0,			/* Stored.  */
+    COSTS_N_INSNS (1)  /* Store_unaligned.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (11),	/* Div.  */
+      COSTS_N_INSNS (5),	/* Mult.  */
+      COSTS_N_INSNS (5),	/* Mult_addsub.  */
+      COSTS_N_INSNS (5),	/* Fma.  */
+      COSTS_N_INSNS (3),	/* Addsub.  */
+      0,			/* Fpconst.  */
+      COSTS_N_INSNS (1),	/* Neg.  */
+      0,			/* Compare.  */
+      COSTS_N_INSNS (5),	/* Widen.  */
+      COSTS_N_INSNS (5),	/* Narrow.  */
+      COSTS_N_INSNS (5),	/* Toint.  */
+      COSTS_N_INSNS (5),	/* Fromint.  */
+      COSTS_N_INSNS (1)		/* Roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (21),	/* Div.  */
+      COSTS_N_INSNS (5),	/* Mult.  */
+      COSTS_N_INSNS (5),	/* Mult_addsub.  */
+      COSTS_N_INSNS (5),	/* Fma.  */
+      COSTS_N_INSNS (3),	/* Addsub.  */
+      0,			/* Fpconst.  */
+      COSTS_N_INSNS (1),	/* Neg.  */
+      0,			/* Compare.  */
+      COSTS_N_INSNS (5),	/* Widen.  */
+      COSTS_N_INSNS (5),	/* Narrow.  */
+      COSTS_N_INSNS (5),	/* Toint.  */
+      COSTS_N_INSNS (5),	/* Fromint.  */
+      COSTS_N_INSNS (1)		/* Roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)	/* Alu.  */
+  }
+};
+
+
+
+#endif
+
Index: config/aarch64/aarch64-cores.def
===================================================================
--- config/aarch64/aarch64-cores.def	(revision 216416)
+++ config/aarch64/aarch64-cores.def	(working copy)
@@ -36,6 +36,7 @@
 
 AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa53)
 AARCH64_CORE("cortex-a57",  cortexa15, cortexa15, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57)
+AARCH64_CORE("thunderx",    thunderx,  cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx)
 
 /* V8 big.LITTLE implementations.  */
 
Index: config/aarch64/aarch64-tune.md
===================================================================
--- config/aarch64/aarch64-tune.md	(revision 216416)
+++ config/aarch64/aarch64-tune.md	(working copy)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-	"cortexa53,cortexa15,cortexa57cortexa53"
+	"cortexa53,cortexa15,thunderx,cortexa57cortexa53"
 	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
Index: config/aarch64/aarch64.c
===================================================================
--- config/aarch64/aarch64.c	(revision 216416)
+++ config/aarch64/aarch64.c	(working copy)
@@ -65,7 +65,7 @@
 #include "dwarf2.h"
 #include "cfgloop.h"
 #include "tree-vectorizer.h"
-#include "config/arm/aarch-cost-tables.h"
+#include "aarch64-cost-tables.h"
 #include "dumpfile.h"
 #include "builtins.h"
 
@@ -242,6 +242,14 @@ static const struct cpu_regmove_cost cor
   NAMED_PARAM (FP2FP, 2)
 };
 
+static const struct cpu_regmove_cost thunderx_regmove_cost =
+{
+  NAMED_PARAM (GP2GP, 2),
+  NAMED_PARAM (GP2FP, 2),
+  NAMED_PARAM (FP2GP, 6),
+  NAMED_PARAM (FP2FP, 4)
+};
+
 /* Generic costs for vector insn classes.  */
 #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
 __extension__
@@ -315,6 +323,16 @@ static const struct tune_params cortexa5
   NAMED_PARAM (issue_rate, 3)
 };
 
+static const struct tune_params thunderx_tunings =
+{
+  &thunderx_extra_costs,
+  &generic_addrcost_table,
+  &thunderx_regmove_cost,
+  &generic_vector_cost,
+  NAMED_PARAM (memmov_cost, 6),
+  NAMED_PARAM (issue_rate, 2)
+};
+
 /* A processor implementing AArch64.  */
 struct processor
 {
