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[209.132.180.131]) by mx.google.com with ESMTPS id fc2si19963337pbd.137.2015.11.12.05.13.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Nov 2015 05:13:04 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-413793-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-return-413793-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-413793-patch=linaro.org@gcc.gnu.org; dkim=pass header.i=@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=jCTDmeb+HQFd2IHZV5 n30D5hQzLEtVvi/ktO2f4rDk5QcKiDxFTJN4GpFh9MwSlm/RnKjcrSdVrZpFiMLu RbSxngY6nRRpBq7WqXj5AybDJ/7bUL5r1K6jtkbyUbF73OSCFk9Svgp3eNRNz6nr 1uvphswT0eShl7dIBi+slmcFk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=0yfvt+2+l64yjL6XlVMNAl8d BUQ=; b=pUeeeCFQbgYMEIndFr/pgCsy7PN+8L+ijogOwFjIZYl7CSQEJbIrCcAh pfnSW9McbYXw+rpdXxLcS9OGA7U3Gl80+SKnWNi0YjUPkr5Q+ugkr+bWwbQxPITW jNm5yC7Z3lne87Wj7s+Ofy3PzhMprC0RrU7D3LF0N7Cn4vj/36Y= Received: (qmail 28121 invoked by alias); 12 Nov 2015 13:12:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28105 invoked by uid 89); 12 Nov 2015 13:12:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f182.google.com Received: from mail-ob0-f182.google.com (HELO mail-ob0-f182.google.com) (209.85.214.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 12 Nov 2015 13:12:48 +0000 Received: by obbww6 with SMTP id ww6so45859490obb.0 for ; Thu, 12 Nov 2015 05:12:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=jSvxZXM8bmkAjNBQJBQgWPrPpbEDOr/vQACRU9+KBOU=; b=LkcGu/zkGgjmfh1xRX04cUCusFgVqV+vtYa7N0eHKQxUDNi8+iRhW/MPKvcq96fTQl aLHAJNmoLjRccYmyvehiWL1joB1xYFY4eK1RyDdr3NclR4r1oq1haSq+L7EViVgM2Z1y q/jPcTjjBmFoyG2GfReea3NIYzanwcHqKRXde7svaO+vnQSz4fgZAPGwUYZkcGgkp3r0 PpJl17zO0Ij7+otHmupbj5zomZ9wFqBEB2uFYgJEUxoMbafDy2WPMbpBowXtT3NuPtKe joThMC7Xt/T2CPD1U1/1+bIrz8abstvbhtCi6G3Dk0HLQVjYkVy0m2kAwSTAcfAdkplH akww== X-Gm-Message-State: ALoCoQmrPVDLY7RqaSq8Dl52whPTVkjmqjmZCUChI74pM527z2KnVdb+brq4E1xy5ejwIyTHW7qp MIME-Version: 1.0 X-Received: by 10.60.82.168 with SMTP id j8mr8205083oey.39.1447333966620; Thu, 12 Nov 2015 05:12:46 -0800 (PST) Received: by 10.202.215.215 with HTTP; Thu, 12 Nov 2015 05:12:46 -0800 (PST) In-Reply-To: <56406147.2050705@foss.arm.com> References: <1446942404-11561-1-git-send-email-charles.baylis@linaro.org> <1446942404-11561-2-git-send-email-charles.baylis@linaro.org> <56406147.2050705@foss.arm.com> Date: Thu, 12 Nov 2015 13:12:46 +0000 Message-ID: Subject: Re: [PATCH 1/4] [ARM] PR63870 Add qualifiers for NEON builtins From: Charles Baylis To: Ramana Radhakrishnan Cc: Kyrylo Tkachov , Alan Lawrence , Richard Earnshaw , GCC Patches X-IsSubscribed: yes On 9 November 2015 at 09:03, Ramana Radhakrishnan wrote: > > Missing comment and please prefix this with NEON_ or SIMD_ . > >> >> +#define ENDIAN_LANE_N(mode, n) \ >> + (BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (mode) - 1 - n : n) >> + > > Otherwise OK - With those changes, the attached patch was applied as r230142 >From 4a05b67a1757e88e1989ce7515cd10de0a6def1c Mon Sep 17 00:00:00 2001 From: Charles Baylis Date: Wed, 17 Jun 2015 17:08:30 +0100 Subject: [PATCH 1/4] [ARM] PR63870 Add qualifiers for NEON builtins gcc/ChangeLog: Charles Baylis PR target/63870 * config/arm/arm-builtins.c (enum arm_type_qualifiers): New enumerator qualifier_struct_load_store_lane_index. (builtin_arg): New enumerator NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX. (arm_expand_neon_args): New parameter. Remove ellipsis. Handle NEON argument qualifiers. (arm_expand_neon_builtin): Handle new NEON argument qualifier. * config/arm/arm.h (NEON_ENDIAN_LANE_N): New macro. Change-Id: Iaa14d8736879fa53776319977eda2089f0a26647 --- gcc/config/arm/arm-builtins.c | 48 +++++++++++++++++++++++++++---------------- gcc/config/arm/arm.c | 1 + gcc/config/arm/arm.h | 6 ++++++ 3 files changed, 37 insertions(+), 18 deletions(-) diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index bad3dc3..d0bd777 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -67,7 +67,9 @@ enum arm_type_qualifiers /* Polynomial types. */ qualifier_poly = 0x100, /* Lane indices - must be within range of previous argument = a vector. */ - qualifier_lane_index = 0x200 + qualifier_lane_index = 0x200, + /* Lane indices for single lane structure loads and stores. */ + qualifier_struct_load_store_lane_index = 0x400 }; /* The qualifier_internal allows generation of a unary builtin from @@ -1963,6 +1965,7 @@ typedef enum { NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_LANE_INDEX, + NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX, NEON_ARG_MEMORY, NEON_ARG_STOP } builtin_arg; @@ -2020,9 +2023,9 @@ neon_dereference_pointer (tree exp, tree type, machine_mode mem_mode, /* Expand a Neon builtin. */ static rtx arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode, - int icode, int have_retval, tree exp, ...) + int icode, int have_retval, tree exp, + builtin_arg *args) { - va_list ap; rtx pat; tree arg[SIMD_MAX_BUILTIN_ARGS]; rtx op[SIMD_MAX_BUILTIN_ARGS]; @@ -2037,13 +2040,11 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode, || !(*insn_data[icode].operand[0].predicate) (target, tmode))) target = gen_reg_rtx (tmode); - va_start (ap, exp); - formals = TYPE_ARG_TYPES (TREE_TYPE (arm_builtin_decls[fcode])); for (;;) { - builtin_arg thisarg = (builtin_arg) va_arg (ap, int); + builtin_arg thisarg = args[argc]; if (thisarg == NEON_ARG_STOP) break; @@ -2079,6 +2080,18 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode, op[argc] = copy_to_mode_reg (mode[argc], op[argc]); break; + case NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX: + gcc_assert (argc > 1); + if (CONST_INT_P (op[argc])) + { + neon_lane_bounds (op[argc], 0, + GET_MODE_NUNITS (map_mode), exp); + /* Keep to GCC-vector-extension lane indices in the RTL. */ + op[argc] = + GEN_INT (NEON_ENDIAN_LANE_N (map_mode, INTVAL (op[argc]))); + } + goto constant_arg; + case NEON_ARG_LANE_INDEX: /* Previous argument must be a vector, which this indexes. */ gcc_assert (argc > 0); @@ -2089,19 +2102,22 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode, } /* Fall through - if the lane index isn't a constant then the next case will error. */ + case NEON_ARG_CONSTANT: +constant_arg: if (!(*insn_data[icode].operand[opno].predicate) (op[argc], mode[argc])) - error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, " - "expected %", argc + 1); + { + error ("%Kargument %d must be a constant immediate", + exp, argc + 1); + return const0_rtx; + } break; + case NEON_ARG_MEMORY: /* Check if expand failed. */ if (op[argc] == const0_rtx) - { - va_end (ap); return 0; - } gcc_assert (MEM_P (op[argc])); PUT_MODE (op[argc], mode[argc]); /* ??? arm_neon.h uses the same built-in functions for signed @@ -2122,8 +2138,6 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode, } } - va_end (ap); - if (have_retval) switch (argc) { @@ -2235,6 +2249,8 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target) if (d->qualifiers[qualifiers_k] & qualifier_lane_index) args[k] = NEON_ARG_LANE_INDEX; + else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index) + args[k] = NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX; else if (d->qualifiers[qualifiers_k] & qualifier_immediate) args[k] = NEON_ARG_CONSTANT; else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate) @@ -2260,11 +2276,7 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target) the function is void, and a 1 if it is not. */ return arm_expand_neon_args (target, d->mode, fcode, icode, !is_void, exp, - args[1], - args[2], - args[3], - args[4], - NEON_ARG_STOP); + &args[1]); } /* Expand an expression EXP that calls a built-in function, diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 61e2aa2..3d0c5d5 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -30111,4 +30111,5 @@ arm_sched_fusion_priority (rtx_insn *insn, int max_pri, *pri = tmp; return; } + #include "gt-arm.h" diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index a1a04a9..313fed5 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -284,6 +284,12 @@ extern void (*arm_lang_output_object_attributes_hook)(void); #define TARGET_BPABI false #endif +/* Transform lane numbers on big endian targets. This is used to allow for the + endianness difference between NEON architectural lane numbers and those + used in RTL */ +#define NEON_ENDIAN_LANE_N(mode, n) \ + (BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (mode) - 1 - n : n) + /* Support for a compile-time default CPU, et cetera. The rules are: --with-arch is ignored if -march or -mcpu are specified. --with-cpu is ignored if -march or -mcpu are specified, and is overridden -- 1.9.1