From patchwork Thu Dec 15 16:07:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 88191 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp882563qgi; Thu, 15 Dec 2016 08:10:59 -0800 (PST) X-Received: by 10.84.164.106 with SMTP id m39mr3888027plg.97.1481818259516; Thu, 15 Dec 2016 08:10:59 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 1si3140831pll.154.2016.12.15.08.10.59 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Dec 2016 08:10:59 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-444533-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-444533-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-444533-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; q=dns; s=default; b=glp691yABKixmMvtwoA7G8kTi1LZB pzQLFLUzNEGj76CwYObb+F45P8ix5iphsRfttNwGj2je+yEqcz2bwvGAqpCaJOOh lDApo4bO8IIsCwjebCwzZ4PmJEVaOovvbSXo86sKuOSoRLqyGxClhaQ8HVeG4SGC cp1g6Tfv3J/Q3E= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; s=default; bh=XKKB1n0o7+II5Gauw2NcAFBZ7tU=; b=Qs0 Yor2IOXSt0VZbxdfMQ5WNsMgRQ86P6fO2r3YhB0vxcNS8eN6ka7/GufLMYMl0qKO 5XRLFIUQYfT0sllT1veHoLTs2PjEcSLRcZ7E/2BnV8sen+Y+cMvnT1AvLGdtc/Yl jGxaZWwa1iOWBIUbAYxFBjRm8XZrh2K5+bZ4n+WA= Received: (qmail 43242 invoked by alias); 15 Dec 2016 16:07:57 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 43172 invoked by uid 89); 15 Dec 2016 16:07:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.0 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=Hook X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 15 Dec 2016 16:07:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B52881516; Thu, 15 Dec 2016 08:07:53 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 674F93F445 for ; Thu, 15 Dec 2016 08:07:53 -0800 (PST) From: "Richard Earnshaw (lists)" Subject: [PATCH 19/21] [arm] Use ISA feature sets for determining inlinability. To: gcc-patches@gcc.gnu.org References: Message-ID: Date: Thu, 15 Dec 2016 16:07:52 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: Now that we can construct the build target isa from the cl_target_options data we can use this to determine inlinability. This eliminates the final remaining use of the FPU features field. * arm.c (arm_can_inline_p): Use ISA features for determining inlinability. --- gcc/config/arm/arm.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index df520e5..1d3bb89 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -30227,6 +30227,7 @@ arm_can_inline_p (tree caller, tree callee) { tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller); tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee); + bool can_inline = true; struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree ? caller_tree @@ -30236,19 +30237,29 @@ arm_can_inline_p (tree caller, tree callee) = TREE_TARGET_OPTION (callee_tree ? callee_tree : target_option_default_node); - const struct arm_fpu_desc *caller_fpu - = &all_fpus[caller_opts->x_arm_fpu_index]; - const struct arm_fpu_desc *callee_fpu - = &all_fpus[callee_opts->x_arm_fpu_index]; + if (callee_opts == caller_opts) + return true; - /* Callee's fpu features should be a subset of the caller's. */ - if ((caller_fpu->features & callee_fpu->features) != callee_fpu->features) - return false; + /* Callee's ISA features should be a subset of the caller's. */ + struct arm_build_target caller_target; + struct arm_build_target callee_target; + caller_target.isa = sbitmap_alloc (isa_num_bits); + callee_target.isa = sbitmap_alloc (isa_num_bits); + + arm_configure_build_target (&caller_target, caller_opts, &global_options_set, + false); + arm_configure_build_target (&callee_target, callee_opts, &global_options_set, + false); + if (!bitmap_subset_p (callee_target.isa, caller_target.isa)) + can_inline = false; + + sbitmap_free (caller_target.isa); + sbitmap_free (callee_target.isa); /* OK to inline between different modes. Function with mode specific instructions, e.g using asm, must be explicitly protected with noinline. */ - return true; + return can_inline; } /* Hook to fix function's alignment affected by target attribute. */