From patchwork Wed Nov 18 14:02:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 56941 Delivered-To: patch@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp2578092lbb; Wed, 18 Nov 2015 06:03:02 -0800 (PST) X-Received: by 10.68.230.103 with SMTP id sx7mr2349417pbc.146.1447855382457; Wed, 18 Nov 2015 06:03:02 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id tt9si4693179pbc.91.2015.11.18.06.03.02 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Nov 2015 06:03:02 -0800 (PST) Received-SPF: pass (google.com: domain of libc-alpha-return-65080-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of libc-alpha-return-65080-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-65080-patch=linaro.org@sourceware.org; dkim=pass header.i=@sourceware.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=i7fvz9l2O/jqClRp2yUnJtK/hwLORMY FD2s3UzWD3tbdKncxC0ZaNvS2HVJjCpRr/UHLBTQ2xJYesGyI7RNHxQzzZV6tUHY k4RSX609d1Vy1PZqnm7qMZqUg7wQZ9RcqcZsmfdbspMQLSh0If16xHXQTPfpsqC8 srfzJR936cek= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=CAZ27n9CVovt3OxZu9B3auza8X4=; b=AksWB f3Bkwjusoaww8U8J6YZ71APB5MNPISIJatd/GJ9XAGGwH3KPzZFN15Hy4jLzFaX4 DZToRXM4SqyCSQsWfXh9k8bsLie5eOWibuTTd31GLyPDtr8ISsnx9MS1fGE3UZ7p 13oDuws6E3h/hrKiOO+FVdWhQhuUVrj/RNdKr0= Received: (qmail 26818 invoked by alias); 18 Nov 2015 14:02:51 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 26783 invoked by uid 89); 18 Nov 2015 14:02:49 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-yk0-f172.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=Z6wFRtdw20OnWMdjEN4NO4N80A31SBbKgjcoTR7VQ8E=; b=Srli4JQDXwAslBeH9JbCjTjaC1o/Dd9SpmjlH0CLOgGCU0wQxGP3632lvYVBIW/lba FcDfzzq1UZoqfPIwr+Rl4pt6ZadQRI4HnZpi7LyT/x0ZpEepoErqONKWh7WdM++DsNM7 5eLBh8jYL9u4eyf2k9p9j0hic/JYP9gaQLD9IRRB0jGsXGO8Fb2DAZUC2wW4WRZ3FshY hSg8kNrNv6fy0+XsbrhsI5iC5mlqgcq7jrmsY/XU48Ct4OCAqNg6l9hDVH7lPoTpcvMz Rnfhql2VWGzi+7ucgh/OZ7qSm19RcZsjDWYTZgJXM5C1n/8Vd1AtlMvNJDhyOxUHTz7W FRwg== X-Gm-Message-State: ALoCoQmwnUoSKBFaxIDlfZ18XLMj1T1oFezTi3FlwZhR/v3UwqTbf89jswwad9Nag4u/W+7lD6U3 X-Received: by 10.129.52.143 with SMTP id b137mr1780124ywa.201.1447855366445; Wed, 18 Nov 2015 06:02:46 -0800 (PST) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 1/4] Define __ASSUME_ALIGNED_REGISTER_PAIRS for missing ports Date: Wed, 18 Nov 2015 12:02:33 -0200 Message-Id: <1447855356-4140-2-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1447855356-4140-1-git-send-email-adhemerval.zanella@linaro.org> References: <1447855356-4140-1-git-send-email-adhemerval.zanella@linaro.org> This patch defines __ASSUME_ALIGNED_REGISTER_PAIRS for the missing ports that require 64-bit value (e.g., long long) to be aligned to an even register pair in argument passing. No code change is expected, tested with builds for powerpc32, mips-o32, and armhf. * sysdeps/unix/sysv/linux/arm/kernel-features.h (__ASSUME_ALIGNED_REGISTER_PAIRS): Define. * sysdeps/unix/sysv/linux/mips/kernel-features.h [_MIPS_SIM == _ABIO32] (__ASSUME_ALIGNED_REGISTER_PAIRS): Likewise. * sysdeps/unix/sysv/linux/powerpc/kernel-features.h [!__powerpc64__] (__ASSUME_ALIGNED_REGISTER_PAIRS): Likewise. --- sysdeps/unix/sysv/linux/arm/kernel-features.h | 4 ++++ sysdeps/unix/sysv/linux/mips/kernel-features.h | 6 ++++++ sysdeps/unix/sysv/linux/powerpc/kernel-features.h | 6 ++++++ 4 files changed, 25 insertions(+) -- 1.9.1 diff --git a/sysdeps/unix/sysv/linux/arm/kernel-features.h b/sysdeps/unix/sysv/linux/arm/kernel-features.h index cb407db..8aadbd9 100644 --- a/sysdeps/unix/sysv/linux/arm/kernel-features.h +++ b/sysdeps/unix/sysv/linux/arm/kernel-features.h @@ -42,3 +42,7 @@ # undef __ASSUME_REQUEUE_PI # undef __ASSUME_SET_ROBUST_LIST #endif + +/* Define this if your 32-bit syscall API requires 64-bit register + pairs to start with an even-number register. */ +#define __ASSUME_ALIGNED_REGISTER_PAIRS 1 diff --git a/sysdeps/unix/sysv/linux/mips/kernel-features.h b/sysdeps/unix/sysv/linux/mips/kernel-features.h index 50d9328..9080338 100644 --- a/sysdeps/unix/sysv/linux/mips/kernel-features.h +++ b/sysdeps/unix/sysv/linux/mips/kernel-features.h @@ -47,3 +47,9 @@ # undef __ASSUME_REQUEUE_PI # undef __ASSUME_SET_ROBUST_LIST #endif + +/* Define this if your 32-bit syscall API requires 64-bit register + pairs to start with an even-number register. */ +#if _MIPS_SIM == _ABIO32 +#define __ASSUME_ALIGNED_REGISTER_PAIRS 1 +#endif diff --git a/sysdeps/unix/sysv/linux/powerpc/kernel-features.h b/sysdeps/unix/sysv/linux/powerpc/kernel-features.h index 8a536cf..83d36e8 100644 --- a/sysdeps/unix/sysv/linux/powerpc/kernel-features.h +++ b/sysdeps/unix/sysv/linux/powerpc/kernel-features.h @@ -57,4 +57,10 @@ #endif #define __ASSUME_SENDMMSG_SYSCALL_WITH_SOCKETCALL 1 +/* Define this if your 32-bit syscall API requires 64-bit register + pairs to start with an even-number register. */ +#ifndef __powerpc64__ +# define __ASSUME_ALIGNED_REGISTER_PAIRS 1 +#endif + #include_next