From patchwork Fri May 18 06:10:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 8784 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 639E023E37 for ; Fri, 18 May 2012 06:11:02 +0000 (UTC) Received: from mail-yx0-f180.google.com (mail-yx0-f180.google.com [209.85.213.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3411BA18C08 for ; Fri, 18 May 2012 06:11:02 +0000 (UTC) Received: by mail-yx0-f180.google.com with SMTP id q6so3100391yen.11 for ; Thu, 17 May 2012 23:11:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf :x-pgp-universal:from:to:date:message-id:x-mailer:in-reply-to :references:mime-version:cc:subject:x-beenthere:x-mailman-version :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:content-type:content-transfer-encoding :sender:errors-to:x-gm-message-state; bh=n9Jf8nUO+DK9QANKe9thpbA6ZpE/8VRhYQoLcV3gYGY=; b=oHBfLqeio3f4miQlo6M+TNIFnpi3w/gKOOiUGdvBwYkN0ZVvJiyjj2Tt/A20oLnwE5 swdhlkYyyV1mdqAtgQNW/CJqUR5ajRMOdot/nIvOvAS1oJw8PP8decsEGjHau50BJNwa V/qtGj2y8cOMRvN4MegG23Dg9umU4nMiJcX9MhtmWuD+yCDC9tGn4knoM3O2NCDRi8ry I59ypGjYCYQ8t0S58zTRIpeOUQn9TQ7fLbk3tpJkgvmlAr4lYXNZ9rgyTI40RTDtlgHM h8OrbLOLFcQnd94C0OvFP01it/sDmEePqQIhZCCQfygSX8yI1kXAOzP+xSFJOFpOKx67 Up4g== Received: by 10.42.89.72 with SMTP id f8mr6404837icm.33.1337321461728; Thu, 17 May 2012 23:11:01 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.35.72 with SMTP id o8csp78521ibd; Thu, 17 May 2012 23:11:00 -0700 (PDT) Received: by 10.216.200.90 with SMTP id y68mr6428310wen.49.1337321460451; Thu, 17 May 2012 23:11:00 -0700 (PDT) Received: from mombin.canonical.com (mombin.canonical.com. [91.189.95.16]) by mx.google.com with ESMTP id p8si10243067weh.5.2012.05.17.23.10.59; Thu, 17 May 2012 23:11:00 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1SVGOu-0000eA-Mf; Fri, 18 May 2012 06:10:56 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1SVGOs-0000cd-OZ for linaro-mm-sig@lists.linaro.org; Fri, 18 May 2012 06:10:55 +0000 Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Thu, 17 May 2012 23:10:09 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Thu, 17 May 2012 23:10:46 -0700 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Thu, 17 May 2012 23:10:46 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.245.1; Thu, 17 May 2012 23:10:46 -0700 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Thu, 17 May 2012 23:10:45 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q4I6AWE2005974; Thu, 17 May 2012 23:10:41 -0700 (PDT) From: Hiroshi DOYU To: , , Date: Fri, 18 May 2012 09:10:26 +0300 Message-ID: <1337321427-27748-2-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1337321427-27748-1-git-send-email-hdoyu@nvidia.com> References: <1337321427-27748-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Cc: Russell King , Arnd Bergmann , Konrad Rzeszutek Wilk , Kyungmin Park , linux-kernel@vger.kernel.org, linux-mm@kvack.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [Linaro-mm-sig] [RFC 1/2] dma-mapping: Export arm_iommu_{alloc, free}_iova() functions X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQnNIer0T2NWnO2JPFwYJI8gzfM16L7/jeFAdHOxeugdKxtSLO7DyVU9cqs5/usbauoV2rcp Export __{alloc,free}_iova() as arm_iommu_{alloc,free}_iova(). There are some cases that IOVA allocation and mapping have to be done seperately, especially for perf optimization reasons. This patch allows client modules to {alloc,free} IOVA space by themselves without backing up actual pages for that area. Signed-off-by: Hiroshi DOYU --- arch/arm/include/asm/dma-iommu.h | 4 ++++ arch/arm/mm/dma-mapping.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/dma-iommu.h b/arch/arm/include/asm/dma-iommu.h index 799b094..2595928 100644 --- a/arch/arm/include/asm/dma-iommu.h +++ b/arch/arm/include/asm/dma-iommu.h @@ -30,5 +30,9 @@ void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping); int arm_iommu_attach_device(struct device *dev, struct dma_iommu_mapping *mapping); +dma_addr_t arm_iommu_alloc_iova(struct device *dev, size_t size); + +void arm_iommu_free_iova(struct device *dev, dma_addr_t addr, size_t size); + #endif /* __KERNEL__ */ #endif diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index afb5e7a..bca1715 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1041,6 +1041,21 @@ static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping, return mapping->base + (start << (mapping->order + PAGE_SHIFT)); } +/** + * arm_iommu_alloc_iova + * @dev: valid struct device pointer + * @size: size of buffer to allocate + * + * Allocate IOVA address range + */ +dma_addr_t arm_iommu_alloc_iova(struct device *dev, size_t size) +{ + struct dma_iommu_mapping *mapping = dev->archdata.mapping; + + return __alloc_iova(mapping, size); +} +EXPORT_SYMBOL_GPL(arm_iommu_alloc_iova); + static inline void __free_iova(struct dma_iommu_mapping *mapping, dma_addr_t addr, size_t size) { @@ -1055,6 +1070,22 @@ static inline void __free_iova(struct dma_iommu_mapping *mapping, spin_unlock_irqrestore(&mapping->lock, flags); } +/** + * arm_iommu_free_iova + * @dev: valid struct device pointer + * @iova: iova address being free'ed + * @size: size of buffer to allocate + * + * Free IOVA address range + */ +void arm_iommu_free_iova(struct device *dev, dma_addr_t addr, size_t size) +{ + struct dma_iommu_mapping *mapping = dev->archdata.mapping; + + __free_iova(mapping, addr, size); +} +EXPORT_SYMBOL_GPL(arm_iommu_free_iova); + static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) { struct page **pages;