From patchwork Thu Sep 14 18:46:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 112623 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp1104687qgf; Thu, 14 Sep 2017 11:47:05 -0700 (PDT) X-Google-Smtp-Source: ADKCNb5aiAPemNit+QRkn866zhxKx1rUAu0ABHPhot+eA1GPYXwTu+GFq787CGZhIiCATrPKhO2u X-Received: by 10.84.129.7 with SMTP id 7mr25081045plb.40.1505414825277; Thu, 14 Sep 2017 11:47:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505414825; cv=none; d=google.com; s=arc-20160816; b=1FkzMtxOF7y0JYquz0tPm4EUOXHkNnLXCjPt9dYENFSyYnHkKqULemLNSUXQN2bUn4 MLtTOdJzZFC3P1dfOxl0Wg3QyWo4AG9h+cvsOygHnOfcnkAz61PK/FhztyW0KIhmG4Nj rRHrnIJJI+wFY8n7IRfNP1ULMraNT2/HDug7zBPUgJ14+2qx7+aCvWWzIIs4tNziZd1F MC+cQLDaICw1ikXVEtI6RN4g4GbYbU2ccW8Gy57p7Hfo8AvbVq+Yx8SsEOTH4/ZROgjb +zyKD0JQzazoGHFPKXtILlLw8Gllyo1qc79M9y98lZABgEdnsKw5Rr/5I+f/09JXjKCd y7Lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=obt0OYdAgpslzjPbUtJhcPA5EGRJGr9Jz5yFAy9Yfg8=; b=MM4pFn+m7NxxCrLyLIs0lwEjuqtzzhemyQCZi1NX6yn8bmiFCkehevDyDoD5BrmXGI Vv4/RYL2IMZ/Wt6+/0IObe27aFH6e5CH8IcEkQY2MUciTx9OvOD9xlJzPIplPFa78JHh brBEY8QrmR//FcSt0f+IBq+7WwC2RKXUvr/WMNIMB0sDW6dGj3lvT92yxuBjnhZ5P0mp FwPDTdvAct2pIf5z86yY7flaSTHEe3z23ZRT5N0T+a1E4rQmucJ+870/ulpAWul+/1Et LYvYcG69rW87R1D6R6boh2b9Vgrn2y5O26WXrdTt72QOYrVcaHHhwTEa/rQU6/jQreO8 WvJg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y17si6681751pfl.140.2017.09.14.11.47.05; Thu, 14 Sep 2017 11:47:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751763AbdINSrE (ORCPT + 7 others); Thu, 14 Sep 2017 14:47:04 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:39424 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751753AbdINSrE (ORCPT ); Thu, 14 Sep 2017 14:47:04 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD61E1684; Thu, 14 Sep 2017 11:47:03 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 336633F483; Thu, 14 Sep 2017 11:47:03 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, wangxiongfeng2@huawei.com, hanjun.guo@linaro.org, jhugo@codeaurora.org, john.garry@huawei.com, austinwc@codeaurora.org, sudeep.holla@arm.com, Jeremy Linton Subject: [PATCH 0/6] Support PPTT for ARM64 Date: Thu, 14 Sep 2017 13:46:48 -0500 Message-Id: <20170914184701.20338-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org ACPI 6.2 adds the Processor Properties Topology Table (PPTT), which is used to describe the processor and cache topologies. Ideally it is used to extend/override information provided by the hardware, but right now ARM64 is entirely dependent on firmware provided tables. This patch parses the table for the cache topology and CPU topology. For the latter we also add an additional topology_cod_id() macro, and a package_id for arm64. Initially the physical id will match the cluster id, but we update users of the cluster to utilize the new macro. When we enable PPTT for the arm64 the cluster/socket starts to differ. Because of this we also make some dynamic decisions about mapping thread/core/cod/socket to the thread/socket used by the scheduler. For example on juno: [root@mammon-juno-rh topology]# lstopo-no-graphics Machine (7048MB) Package L#0 L2 L#0 (1024KB) + Core L#0 L1d L#0 (32KB) + L1i L#0 (32KB) + PU L#0 (P#0) L1d L#1 (32KB) + L1i L#1 (32KB) + PU L#1 (P#1) L1d L#2 (32KB) + L1i L#2 (32KB) + PU L#2 (P#2) L1d L#3 (32KB) + L1i L#3 (32KB) + PU L#3 (P#3) L2 L#1 (2048KB) + Core L#1 L1d L#4 (32KB) + L1i L#4 (48KB) + PU L#4 (P#4) L1d L#5 (32KB) + L1i L#5 (48KB) + PU L#5 (P#5) HostBridge L#0 PCIBridge PCIBridge PCIBridge PCI 1095:3132 Block(Disk) L#0 "sda" PCIBridge PCI 1002:68f9 GPU L#1 "renderD128" GPU L#2 "card0" GPU L#3 "controlD64" PCIBridge PCI 11ab:4380 Net L#4 "enp8s0" Jeremy Linton (6): ACPI/PPTT: Add Processor Properties Topology Table parsing ACPI: Enable PPTT support on ARM64 drivers: base: cacheinfo: arm64: Add support for ACPI based firmware tables Topology: Add cluster on die macros and arm64 decoding arm64: Fixup users of topology_physical_package_id arm64: topology: Enable ACPI/PPTT based CPU topology. arch/arm64/Kconfig | 1 + arch/arm64/include/asm/topology.h | 4 +- arch/arm64/kernel/cacheinfo.c | 23 +- arch/arm64/kernel/topology.c | 76 +++++- drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/pptt.c | 508 ++++++++++++++++++++++++++++++++++++++ drivers/base/cacheinfo.c | 17 +- drivers/clk/clk-mb86s7x.c | 2 +- drivers/cpufreq/arm_big_little.c | 2 +- drivers/firmware/psci_checker.c | 2 +- include/linux/cacheinfo.h | 10 +- include/linux/topology.h | 5 + 13 files changed, 634 insertions(+), 20 deletions(-) create mode 100644 drivers/acpi/pptt.c -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html