From patchwork Mon Feb 4 12:13:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 157401 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3846291jaa; Mon, 4 Feb 2019 04:16:26 -0800 (PST) X-Google-Smtp-Source: AHgI3IZtx+juVwiBlAOesYO3fQd8WLjj8KTjxC6Gn/PPbLppn/rLocrZYeEZ6ZLgEtLNmgcqe4jq X-Received: by 2002:a63:da14:: with SMTP id c20mr12099938pgh.233.1549282586822; Mon, 04 Feb 2019 04:16:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549282586; cv=none; d=google.com; s=arc-20160816; b=b8/+v3k3MjVw28o5iD5Zf/V8VIE9zORljY1YEH/btddcs8EUA7mVSCNjf1qO/MFYdu wi3yKQm13hURYm+2G2GCQqkpBt6IFscuapx7Dcuz4/8KM7ofSxS/vDe7qFuqxJwFv9VM Rl7Y8ylTtTnyfwkFrZC5cr9QrMo7NnT/tVdoX2j3KZqkG1BRLiJGeWlx+68H49xmkUOo 9Oz1gLvkmbtVDpva66/epUNArfjFBTV3cr5Ni9ot2EIG8mTgNAs9FvRcKRJSdxC4CzX6 Zq/liqlSWDP3wLE35MxSB+UFQQtVBRfEwKJOYmtajSycdpO5Vj458Rqxm6dZyZKIjXj5 Eh6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=s1KKPu7DCDaX9F+necOWohf52dk5RQrrE1mDP/rSRm8=; b=b++O4xIkvyEDZXuqsld6JgBrTx+yjOy+sgZfdSVJpFwSmSKTS6Ew9sFW2YjKkpbeqx 4bSoHl28w2NjYfd/Jk6PEkJcoZ6RbwqKv7TaADlG8LB4xB1M7tjWCyHlBPYFGiecNeI9 cYb7hViJW9CPeGSKY/i+DpNSoXALZ4fFgRmGTdYKoECCkqApj1GLq3ZUaJeCimrh1uOh Z0XCRH8glipKuKgWioJ7w+tyhhW9lOabRMMovd9k2bXZDxm4h90U4nP+E49o7PkOTuH+ PCMthiGsrmvcebB32P1NeDv6fsUMyJ5dUIbvUs+5juuxUjeCjiwrcDRxzNmBk9cijkPd 13Jw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h16si14701665pgj.203.2019.02.04.04.16.26; Mon, 04 Feb 2019 04:16:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729978AbfBDMQZ (ORCPT + 9 others); Mon, 4 Feb 2019 07:16:25 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:3174 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728216AbfBDMQZ (ORCPT ); Mon, 4 Feb 2019 07:16:25 -0500 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 1C0BC8CD7ADCC1D2BF74; Mon, 4 Feb 2019 20:16:23 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.408.0; Mon, 4 Feb 2019 20:16:15 +0800 From: Shameer Kolothum To: , CC: , , , , , , , , , , , , , Subject: [PATCH v6 0/4] arm64 SMMUv3 PMU driver with IORT support Date: Mon, 4 Feb 2019 12:13:20 +0000 Message-ID: <20190204121324.11460-1-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org This adds a driver for the SMMUv3 PMU into the perf framework. It includes an IORT update to support PM Counter Groups. This is based on the initial work done by Neil Leeder[1] SMMUv3 PMCG devices are named as smmuv3_pmcg_ where is the physical page address of the SMMU PMCG. For example, the PMCG at 0xff88840000 is named smmuv3_pmcg_ff88840 Usage example: For common arch supported events: perf stat -e smmuv3_pmcg_ff88840/transaction,filter_enable=1, filter_span=1,filter_stream_id=0x42/ -a netperf For IMP DEF events: perf stat -e smmuv3_pmcg_ff88840/event=id/ -a netperf This is sanity tested on a HiSilicon platform that requires a quirk to run it properly. As per HiSilicon erratum #162001800, PMCG event counter registers (SMMU_PMCG_EVCNTRn) on HiSilicon Hip08 platforms are read only and this prevents the software from setting the initial period on event start. Unfortunately we were a bit late in the cycle to detect this issue and now require software workaround for this. Patch #4 is added to this series to provide a workaround for this issue. Further testing on supported platforms are very much welcome. v5 ---> v6 -Addressed comments from Robin and Andrew. -Changed the way global filter settings are applied as a probable fix to the v5 bug where in-use settings gets overwritten. -Use of PMCG model number to identify the platform. -Added R-by from Robin to patches #1 and #3. v4 ---> v5 -IORT code is modified to pass the option/quirk flags to the driver through platform_data (patch #4), based on Robin's comments. -Removed COMPILE_TEST (patch #2). v3 --> v4 -Addressed comments from Jean and Robin. -Merged dma config callbacks as per Lorenzo's comments(patch #1). -Added handling of Global(Counter0) filter settings mode(patch #2). -Added patch #4 to address HiSilicon erratum #162001800 - v2 --> v3 -Addressed comments from Robin. -Removed iort helper function to retrieve the PMCG reference smmu. -PMCG devices are now named using the base address v1 --> v2 - Addressed comments from Robin. - Added an helper to retrieve the associated smmu dev and named PMUs to make the association visible to user. - Added MSI support for overflow irq [1]https://www.spinics.net/lists/arm-kernel/msg598591.html Neil Leeder (2): acpi: arm64: add iort support for PMCG perf: add arm64 smmuv3 pmu driver Shameer Kolothum (2): perf/smmuv3: Add MSI irq support perf/smmuv3_pmu: Enable HiSilicon Erratum 162001800 quirk drivers/acpi/arm64/iort.c | 131 +++++-- drivers/perf/Kconfig | 9 + drivers/perf/Makefile | 1 + drivers/perf/arm_smmuv3_pmu.c | 873 ++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi_iort.h | 7 + 5 files changed, 997 insertions(+), 24 deletions(-) create mode 100644 drivers/perf/arm_smmuv3_pmu.c -- 2.7.4 Acked-by: Lorenzo Pieralisi