| Message ID | 20230905015116.2268926-1-li.meng@amd.com |
|---|---|
| Headers | show |
| Series | amd-pstate preferred core | expand |
On 9/4/2023 20:51, Meng Li wrote: > amd-pstate driver also uses SCHED_MC_PRIO, so decouple the requirement > of CPU_SUP_INTEL from the dependencies to allow compilation in kernels > without Intel CPU support. > > Signed-off-by: Meng Li <li.meng@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > --- > arch/x86/Kconfig | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 8d9e4b362572..887421b5ee8f 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -1052,8 +1052,9 @@ config SCHED_MC > > config SCHED_MC_PRIO > bool "CPU core priorities scheduler support" > - depends on SCHED_MC && CPU_SUP_INTEL > - select X86_INTEL_PSTATE > + depends on SCHED_MC > + select X86_INTEL_PSTATE if CPU_SUP_INTEL > + select X86_AMD_PSTATE if CPU_SUP_AMD > select CPU_FREQ > default y > help
On 9/4/2023 20:51, Meng Li wrote: > amd-pstate driver utilizes the functions and data structures > provided by the ITMT architecture to enable the scheduler to > favor scheduling on cores which can be get a higher frequency > with lower voltage. We call it amd-pstate preferrred core. > > Here sched_set_itmt_core_prio() is called to set priorities and > sched_set_itmt_support() is called to enable ITMT feature. > amd-pstate driver uses the highest performance value to indicate > the priority of CPU. The higher value has a higher priority. > > The initial core rankings are set up by amd-pstate when the > system boots. > > Add device attribute for hardware preferred core. It will check > if the processor and power firmware support preferred core > feature. > > Add device attribute for preferred core. Only when hardware > supports preferred core and user set `enabled` in early parameter, > it can be set to enabled. > > Add one new early parameter `disable` to allow user to disable > the preferred core. > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> > Signed-off-by: Meng Li <li.meng@amd.com> > Co-developed-by: Meng Li <li.meng@amd.com> > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> You've got the tag order wrong I believe for this. Did checkpatch not make noise? I think it's supposed to be: Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Meng Li <li.meng@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 131 ++++++++++++++++++++++++++++++----- > 1 file changed, 115 insertions(+), 16 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 9a1e194d5cf8..454eb6e789e7 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -37,6 +37,7 @@ > #include <linux/uaccess.h> > #include <linux/static_call.h> > #include <linux/amd-pstate.h> > +#include <linux/topology.h> > > #include <acpi/processor.h> > #include <acpi/cppc_acpi.h> > @@ -49,6 +50,8 @@ > > #define AMD_PSTATE_TRANSITION_LATENCY 20000 > #define AMD_PSTATE_TRANSITION_DELAY 1000 > +#define AMD_PSTATE_PREFCORE_THRESHOLD 166 > +#define AMD_PSTATE_MAX_CPPC_PERF 255 > > /* > * TODO: We need more time to fine tune processors with shared memory solution > @@ -65,6 +68,12 @@ static struct cpufreq_driver amd_pstate_epp_driver; > static int cppc_state = AMD_PSTATE_UNDEFINED; > static bool cppc_enabled; > > +/*HW preferred Core featue is supported*/ > +static bool hw_prefcore = true; > + > +/*Preferred Core featue is supported*/ > +static bool prefcore = true; > + > /* > * AMD Energy Preference Performance (EPP) > * The EPP is used in the CCLK DPM controller to drive > @@ -290,23 +299,21 @@ static inline int amd_pstate_enable(bool enable) > static int pstate_init_perf(struct amd_cpudata *cpudata) > { > u64 cap1; > - u32 highest_perf; > > int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, > &cap1); > if (ret) > return ret; > > - /* > - * TODO: Introduce AMD specific power feature. > - * > - * CPPC entry doesn't indicate the highest performance in some ASICs. > + /* For platforms that do not support the preferred core feature, the > + * highest_pef may be configured with 166 or 255, to avoid max frequency > + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as > + * the default max perf. > */ > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) > - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); > > WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); > @@ -318,17 +325,15 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) > static int cppc_init_perf(struct amd_cpudata *cpudata) > { > struct cppc_perf_caps cppc_perf; > - u32 highest_perf; > > int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); > if (ret) > return ret; > > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > cppc_perf.highest_perf) > - highest_perf = cppc_perf.highest_perf; > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf); > > WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, > @@ -676,6 +681,73 @@ static void amd_perf_ctl_reset(unsigned int cpu) > wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); > } > > +/* > + * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks > + * due to locking, so queue the work for later. > + */ > +static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) > +{ > + sched_set_itmt_support(); > +} > +static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); > + > +/* > + * Get the highest performance register value. > + * @cpu: CPU from which to get highest performance. > + * @highest_perf: Return address. > + * > + * Return: 0 for success, -EIO otherwise. > + */ > +static int amd_pstate_get_highest_perf(int cpu, u64 *highest_perf) > +{ > + int ret; > + > + if (boot_cpu_has(X86_FEATURE_CPPC)) { > + u64 cap1; > + > + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); > + if (ret) > + return ret; > + WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); > + } else { > + ret = cppc_get_highest_perf(cpu, highest_perf); > + } > + > + return (ret); > +} > + > +static void amd_pstate_init_prefcore(void) > +{ > + int cpu, ret; > + u64 highest_perf; > + > + if (!prefcore) > + return; > + > + for_each_online_cpu(cpu) { > + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); > + if (ret) > + break; > + > + sched_set_itmt_core_prio(highest_perf, cpu); > + > + /* check if CPPC preferred core feature is enabled*/ > + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { > + hw_prefcore = false; > + prefcore = false; > + return; > + } > + } > + > + /* > + * This code can be run during CPU online under the > + * CPU hotplug locks, so sched_set_amd_prefcore_support() > + * cannot be called from here. Queue up a work item > + * to invoke it. > + */ > + schedule_work(&sched_prefcore_work); > +} > + > static int amd_pstate_cpu_init(struct cpufreq_policy *policy) > { > int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; > @@ -1037,6 +1109,18 @@ static ssize_t status_store(struct device *a, struct device_attribute *b, > return ret < 0 ? ret : count; > } > > +static ssize_t hw_prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", hw_prefcore ? "supported" : "unsupported"); > +} > + > +static ssize_t prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", prefcore ? "enabled" : "disabled"); > +} > + > cpufreq_freq_attr_ro(amd_pstate_max_freq); > cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); > > @@ -1044,6 +1128,8 @@ cpufreq_freq_attr_ro(amd_pstate_highest_perf); > cpufreq_freq_attr_rw(energy_performance_preference); > cpufreq_freq_attr_ro(energy_performance_available_preferences); > static DEVICE_ATTR_RW(status); > +static DEVICE_ATTR_RO(hw_prefcore); > +static DEVICE_ATTR_RO(prefcore); > > static struct freq_attr *amd_pstate_attr[] = { > &amd_pstate_max_freq, > @@ -1063,6 +1149,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { > > static struct attribute *pstate_global_attributes[] = { > &dev_attr_status.attr, > + &dev_attr_prefcore.attr, > NULL > }; > > @@ -1506,6 +1593,8 @@ static int __init amd_pstate_init(void) > } > } > > + amd_pstate_init_prefcore(); > + > return ret; > > global_attr_free: > @@ -1527,7 +1616,17 @@ static int __init amd_pstate_param(char *str) > > return amd_pstate_set_driver(mode_idx); > } > + > +static int __init amd_prefcore_param(char *str) > +{ > + if (!strcmp(str, "disable")) > + prefcore = false; > + > + return 0; > +} > + > early_param("amd_pstate", amd_pstate_param); > +early_param("amd_prefcore", amd_prefcore_param); > > MODULE_AUTHOR("Huang Rui <ray.huang@amd.com>"); > MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver");
On Tue, Sep 05, 2023 at 09:51:10AM +0800, Meng, Li (Jassmine) wrote: > amd-pstate driver also uses SCHED_MC_PRIO, so decouple the requirement > of CPU_SUP_INTEL from the dependencies to allow compilation in kernels > without Intel CPU support. > > Signed-off-by: Meng Li <li.meng@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> > --- > arch/x86/Kconfig | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 8d9e4b362572..887421b5ee8f 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -1052,8 +1052,9 @@ config SCHED_MC > > config SCHED_MC_PRIO > bool "CPU core priorities scheduler support" > - depends on SCHED_MC && CPU_SUP_INTEL > - select X86_INTEL_PSTATE > + depends on SCHED_MC > + select X86_INTEL_PSTATE if CPU_SUP_INTEL > + select X86_AMD_PSTATE if CPU_SUP_AMD > select CPU_FREQ > default y > help > -- > 2.34.1 >
On Tue, Sep 05, 2023 at 09:51:12AM +0800, Meng, Li (Jassmine) wrote: > amd-pstate driver utilizes the functions and data structures > provided by the ITMT architecture to enable the scheduler to > favor scheduling on cores which can be get a higher frequency > with lower voltage. We call it amd-pstate preferrred core. > > Here sched_set_itmt_core_prio() is called to set priorities and > sched_set_itmt_support() is called to enable ITMT feature. > amd-pstate driver uses the highest performance value to indicate > the priority of CPU. The higher value has a higher priority. > > The initial core rankings are set up by amd-pstate when the > system boots. > > Add device attribute for hardware preferred core. It will check > if the processor and power firmware support preferred core > feature. > > Add device attribute for preferred core. Only when hardware > supports preferred core and user set `enabled` in early parameter, > it can be set to enabled. > > Add one new early parameter `disable` to allow user to disable > the preferred core. > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> > Signed-off-by: Meng Li <li.meng@amd.com> > Co-developed-by: Meng Li <li.meng@amd.com> > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 131 ++++++++++++++++++++++++++++++----- > 1 file changed, 115 insertions(+), 16 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 9a1e194d5cf8..454eb6e789e7 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -37,6 +37,7 @@ > #include <linux/uaccess.h> > #include <linux/static_call.h> > #include <linux/amd-pstate.h> > +#include <linux/topology.h> > > #include <acpi/processor.h> > #include <acpi/cppc_acpi.h> > @@ -49,6 +50,8 @@ > > #define AMD_PSTATE_TRANSITION_LATENCY 20000 > #define AMD_PSTATE_TRANSITION_DELAY 1000 > +#define AMD_PSTATE_PREFCORE_THRESHOLD 166 > +#define AMD_PSTATE_MAX_CPPC_PERF 255 > > /* > * TODO: We need more time to fine tune processors with shared memory solution > @@ -65,6 +68,12 @@ static struct cpufreq_driver amd_pstate_epp_driver; > static int cppc_state = AMD_PSTATE_UNDEFINED; > static bool cppc_enabled; > > +/*HW preferred Core featue is supported*/ > +static bool hw_prefcore = true; > + > +/*Preferred Core featue is supported*/ > +static bool prefcore = true; > + > /* > * AMD Energy Preference Performance (EPP) > * The EPP is used in the CCLK DPM controller to drive > @@ -290,23 +299,21 @@ static inline int amd_pstate_enable(bool enable) > static int pstate_init_perf(struct amd_cpudata *cpudata) > { > u64 cap1; > - u32 highest_perf; > > int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, > &cap1); > if (ret) > return ret; > > - /* > - * TODO: Introduce AMD specific power feature. > - * > - * CPPC entry doesn't indicate the highest performance in some ASICs. > + /* For platforms that do not support the preferred core feature, the > + * highest_pef may be configured with 166 or 255, to avoid max frequency > + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as > + * the default max perf. > */ > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) > - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); > > WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); > @@ -318,17 +325,15 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) > static int cppc_init_perf(struct amd_cpudata *cpudata) > { > struct cppc_perf_caps cppc_perf; > - u32 highest_perf; > > int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); > if (ret) > return ret; > > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > cppc_perf.highest_perf) > - highest_perf = cppc_perf.highest_perf; > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf); > > WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, > @@ -676,6 +681,73 @@ static void amd_perf_ctl_reset(unsigned int cpu) > wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); > } > > +/* > + * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks > + * due to locking, so queue the work for later. > + */ > +static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) > +{ > + sched_set_itmt_support(); > +} > +static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); > + > +/* > + * Get the highest performance register value. > + * @cpu: CPU from which to get highest performance. > + * @highest_perf: Return address. > + * > + * Return: 0 for success, -EIO otherwise. > + */ > +static int amd_pstate_get_highest_perf(int cpu, u64 *highest_perf) > +{ > + int ret; > + > + if (boot_cpu_has(X86_FEATURE_CPPC)) { > + u64 cap1; > + > + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); > + if (ret) > + return ret; > + WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); > + } else { > + ret = cppc_get_highest_perf(cpu, highest_perf); > + } > + > + return (ret); > +} > + > +static void amd_pstate_init_prefcore(void) > +{ > + int cpu, ret; > + u64 highest_perf; > + > + if (!prefcore) > + return; > + > + for_each_online_cpu(cpu) { > + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); > + if (ret) > + break; > + > + sched_set_itmt_core_prio(highest_perf, cpu); > + > + /* check if CPPC preferred core feature is enabled*/ > + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { > + hw_prefcore = false; > + prefcore = false; I think you should use prefcore which embeds into cpudata structure instead of global variable. Here, actually, you walked through all online cpus, the last cpu's status will overwrite the previous one. > + return; > + } > + } > + > + /* > + * This code can be run during CPU online under the > + * CPU hotplug locks, so sched_set_amd_prefcore_support() > + * cannot be called from here. Queue up a work item > + * to invoke it. > + */ > + schedule_work(&sched_prefcore_work); > +} > + > static int amd_pstate_cpu_init(struct cpufreq_policy *policy) > { > int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; > @@ -1037,6 +1109,18 @@ static ssize_t status_store(struct device *a, struct device_attribute *b, > return ret < 0 ? ret : count; > } > > +static ssize_t hw_prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", hw_prefcore ? "supported" : "unsupported"); > +} Is there any requirement from user space (cpupower or other tool) to query the capacity at runtime? In fact, we can simplify the codes that use a print in the kernel to let user know whether current cpu supports prefcore in hardware side. Thanks, Ray > + > +static ssize_t prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", prefcore ? "enabled" : "disabled"); > +} > + > cpufreq_freq_attr_ro(amd_pstate_max_freq); > cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); > > @@ -1044,6 +1128,8 @@ cpufreq_freq_attr_ro(amd_pstate_highest_perf); > cpufreq_freq_attr_rw(energy_performance_preference); > cpufreq_freq_attr_ro(energy_performance_available_preferences); > static DEVICE_ATTR_RW(status); > +static DEVICE_ATTR_RO(hw_prefcore); > +static DEVICE_ATTR_RO(prefcore); > > static struct freq_attr *amd_pstate_attr[] = { > &amd_pstate_max_freq, > @@ -1063,6 +1149,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { > > static struct attribute *pstate_global_attributes[] = { > &dev_attr_status.attr, > + &dev_attr_prefcore.attr, > NULL > }; > > @@ -1506,6 +1593,8 @@ static int __init amd_pstate_init(void) > } > } > > + amd_pstate_init_prefcore(); > + > return ret; > > global_attr_free: > @@ -1527,7 +1616,17 @@ static int __init amd_pstate_param(char *str) > > return amd_pstate_set_driver(mode_idx); > } > + > +static int __init amd_prefcore_param(char *str) > +{ > + if (!strcmp(str, "disable")) > + prefcore = false; > + > + return 0; > +} > + > early_param("amd_pstate", amd_pstate_param); > +early_param("amd_prefcore", amd_prefcore_param); > > MODULE_AUTHOR("Huang Rui <ray.huang@amd.com>"); > MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); > -- > 2.34.1 >
On 05 Sep 09:51, Meng Li wrote: > amd-pstate driver utilizes the functions and data structures > provided by the ITMT architecture to enable the scheduler to > favor scheduling on cores which can be get a higher frequency > with lower voltage. We call it amd-pstate preferrred core. > > Here sched_set_itmt_core_prio() is called to set priorities and > sched_set_itmt_support() is called to enable ITMT feature. > amd-pstate driver uses the highest performance value to indicate > the priority of CPU. The higher value has a higher priority. > > The initial core rankings are set up by amd-pstate when the > system boots. > > Add device attribute for hardware preferred core. It will check > if the processor and power firmware support preferred core > feature. > > Add device attribute for preferred core. Only when hardware > supports preferred core and user set `enabled` in early parameter, > it can be set to enabled. > > Add one new early parameter `disable` to allow user to disable > the preferred core. > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> > Signed-off-by: Meng Li <li.meng@amd.com> > Co-developed-by: Meng Li <li.meng@amd.com> > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 131 ++++++++++++++++++++++++++++++----- > 1 file changed, 115 insertions(+), 16 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 9a1e194d5cf8..454eb6e789e7 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -37,6 +37,7 @@ > #include <linux/uaccess.h> > #include <linux/static_call.h> > #include <linux/amd-pstate.h> > +#include <linux/topology.h> > > #include <acpi/processor.h> > #include <acpi/cppc_acpi.h> > @@ -49,6 +50,8 @@ > > #define AMD_PSTATE_TRANSITION_LATENCY 20000 > #define AMD_PSTATE_TRANSITION_DELAY 1000 > +#define AMD_PSTATE_PREFCORE_THRESHOLD 166 > +#define AMD_PSTATE_MAX_CPPC_PERF 255 > > /* > * TODO: We need more time to fine tune processors with shared memory solution > @@ -65,6 +68,12 @@ static struct cpufreq_driver amd_pstate_epp_driver; > static int cppc_state = AMD_PSTATE_UNDEFINED; > static bool cppc_enabled; > > +/*HW preferred Core featue is supported*/ > +static bool hw_prefcore = true; > + > +/*Preferred Core featue is supported*/ > +static bool prefcore = true; > + > /* > * AMD Energy Preference Performance (EPP) > * The EPP is used in the CCLK DPM controller to drive > @@ -290,23 +299,21 @@ static inline int amd_pstate_enable(bool enable) > static int pstate_init_perf(struct amd_cpudata *cpudata) > { > u64 cap1; > - u32 highest_perf; > > int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, > &cap1); > if (ret) > return ret; > > - /* > - * TODO: Introduce AMD specific power feature. > - * > - * CPPC entry doesn't indicate the highest performance in some ASICs. > + /* For platforms that do not support the preferred core feature, the > + * highest_pef may be configured with 166 or 255, to avoid max frequency > + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as > + * the default max perf. > */ > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) > - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); As mentioned in the v3, this should be checking hw_prefcore. For example: Let's consider a cap1 value for a CPU is: e752380d and the system can go to freq 3.5 GHz. The system supports preferred core but user added prefcore=disable command line option. Therefore below will be the perf values after amd_pstate init: lowest_perf: 13 lowest_nonlinear_perf: 56 nominal_perf: 82 highest_perf: 231 Let's say user selected userspace governor and tries to set frequency 2.8 Ghz. Then des_perf calculation would be as below: des_perf = 2800000 * 231 / 3500000 = 184 Which is wrong. Because HW only allows des_perf upto 166 (because HW supports preferred core). If we restrict highest_perf to 166 in preferred core supported (by HW) system, even when we disable preferred core from SW, then the des_perf calculation stays correct. des_perf = 2800000 * 166 / 3500000 = 132 Therefore when user disables preferred core with prefcore=disable command line in a preferred core supported system, the highest_perf should be AMD_PSTATE_PREFCORE_THRESHOLD (166). > > WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); > @@ -318,17 +325,15 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) > static int cppc_init_perf(struct amd_cpudata *cpudata) > { > struct cppc_perf_caps cppc_perf; > - u32 highest_perf; > > int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); > if (ret) > return ret; > > - highest_perf = amd_get_highest_perf(); > - if (highest_perf > cppc_perf.highest_perf) > - highest_perf = cppc_perf.highest_perf; > - > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > + if (prefcore) > + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); > + else > + WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf); Same here. Thanks, Wyes > > WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); > WRITE_ONCE(cpudata->lowest_nonlinear_perf, > @@ -676,6 +681,73 @@ static void amd_perf_ctl_reset(unsigned int cpu) > wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); > } > > +/* > + * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks > + * due to locking, so queue the work for later. > + */ > +static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) > +{ > + sched_set_itmt_support(); > +} > +static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); > + > +/* > + * Get the highest performance register value. > + * @cpu: CPU from which to get highest performance. > + * @highest_perf: Return address. > + * > + * Return: 0 for success, -EIO otherwise. > + */ > +static int amd_pstate_get_highest_perf(int cpu, u64 *highest_perf) > +{ > + int ret; > + > + if (boot_cpu_has(X86_FEATURE_CPPC)) { > + u64 cap1; > + > + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); > + if (ret) > + return ret; > + WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); > + } else { > + ret = cppc_get_highest_perf(cpu, highest_perf); > + } > + > + return (ret); > +} > + > +static void amd_pstate_init_prefcore(void) > +{ > + int cpu, ret; > + u64 highest_perf; > + > + if (!prefcore) > + return; > + > + for_each_online_cpu(cpu) { > + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); > + if (ret) > + break; > + > + sched_set_itmt_core_prio(highest_perf, cpu); > + > + /* check if CPPC preferred core feature is enabled*/ > + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { > + hw_prefcore = false; > + prefcore = false; > + return; > + } > + } > + > + /* > + * This code can be run during CPU online under the > + * CPU hotplug locks, so sched_set_amd_prefcore_support() > + * cannot be called from here. Queue up a work item > + * to invoke it. > + */ > + schedule_work(&sched_prefcore_work); > +} > + > static int amd_pstate_cpu_init(struct cpufreq_policy *policy) > { > int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; > @@ -1037,6 +1109,18 @@ static ssize_t status_store(struct device *a, struct device_attribute *b, > return ret < 0 ? ret : count; > } > > +static ssize_t hw_prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", hw_prefcore ? "supported" : "unsupported"); > +} > + > +static ssize_t prefcore_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + return sysfs_emit(buf, "%s\n", prefcore ? "enabled" : "disabled"); > +} > + > cpufreq_freq_attr_ro(amd_pstate_max_freq); > cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); > > @@ -1044,6 +1128,8 @@ cpufreq_freq_attr_ro(amd_pstate_highest_perf); > cpufreq_freq_attr_rw(energy_performance_preference); > cpufreq_freq_attr_ro(energy_performance_available_preferences); > static DEVICE_ATTR_RW(status); > +static DEVICE_ATTR_RO(hw_prefcore); > +static DEVICE_ATTR_RO(prefcore); > > static struct freq_attr *amd_pstate_attr[] = { > &amd_pstate_max_freq, > @@ -1063,6 +1149,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { > > static struct attribute *pstate_global_attributes[] = { > &dev_attr_status.attr, > + &dev_attr_prefcore.attr, > NULL > }; > > @@ -1506,6 +1593,8 @@ static int __init amd_pstate_init(void) > } > } > > + amd_pstate_init_prefcore(); > + > return ret; > > global_attr_free: > @@ -1527,7 +1616,17 @@ static int __init amd_pstate_param(char *str) > > return amd_pstate_set_driver(mode_idx); > } > + > +static int __init amd_prefcore_param(char *str) > +{ > + if (!strcmp(str, "disable")) > + prefcore = false; > + > + return 0; > +} > + > early_param("amd_pstate", amd_pstate_param); > +early_param("amd_prefcore", amd_prefcore_param); > > MODULE_AUTHOR("Huang Rui <ray.huang@amd.com>"); > MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); > -- > 2.34.1 >
[AMD Official Use Only - General] Hi Ray: > -----Original Message----- > From: Huang, Ray <Ray.Huang@amd.com> > Sent: Wednesday, September 6, 2023 9:53 PM > To: Meng, Li (Jassmine) <Li.Meng@amd.com> > Cc: Rafael J . Wysocki <rafael.j.wysocki@intel.com>; linux- > pm@vger.kernel.org; linux-kernel@vger.kernel.org; x86@kernel.org; linux- > acpi@vger.kernel.org; Shuah Khan <skhan@linuxfoundation.org>; linux- > kselftest@vger.kernel.org; Fontenot, Nathan > <Nathan.Fontenot@amd.com>; Sharma, Deepak > <Deepak.Sharma@amd.com>; Deucher, Alexander > <Alexander.Deucher@amd.com>; Limonciello, Mario > <Mario.Limonciello@amd.com>; Huang, Shimmer > <Shimmer.Huang@amd.com>; Yuan, Perry <Perry.Yuan@amd.com>; Du, > Xiaojian <Xiaojian.Du@amd.com>; Viresh Kumar <viresh.kumar@linaro.org>; > Borislav Petkov <bp@alien8.de> > Subject: Re: [PATCH V5 3/7] cpufreq: amd-pstate: Enable amd-pstate > preferred core supporting. > > On Tue, Sep 05, 2023 at 09:51:12AM +0800, Meng, Li (Jassmine) wrote: > > amd-pstate driver utilizes the functions and data structures provided > > by the ITMT architecture to enable the scheduler to favor scheduling > > on cores which can be get a higher frequency with lower voltage. We > > call it amd-pstate preferrred core. > > > > Here sched_set_itmt_core_prio() is called to set priorities and > > sched_set_itmt_support() is called to enable ITMT feature. > > amd-pstate driver uses the highest performance value to indicate the > > priority of CPU. The higher value has a higher priority. > > > > The initial core rankings are set up by amd-pstate when the system > > boots. > > > > Add device attribute for hardware preferred core. It will check if the > > processor and power firmware support preferred core feature. > > > > Add device attribute for preferred core. Only when hardware supports > > preferred core and user set `enabled` in early parameter, it can be > > set to enabled. > > > > Add one new early parameter `disable` to allow user to disable the > > preferred core. > > > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > > Co-developed-by: Perry Yuan <Perry.Yuan@amd.com> > > Signed-off-by: Meng Li <li.meng@amd.com> > > Co-developed-by: Meng Li <li.meng@amd.com> > > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > > --- > > drivers/cpufreq/amd-pstate.c | 131 > > ++++++++++++++++++++++++++++++----- > > 1 file changed, 115 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/cpufreq/amd-pstate.c > > b/drivers/cpufreq/amd-pstate.c index 9a1e194d5cf8..454eb6e789e7 > 100644 > > --- a/drivers/cpufreq/amd-pstate.c > > +++ b/drivers/cpufreq/amd-pstate.c > > @@ -37,6 +37,7 @@ > > #include <linux/uaccess.h> > > #include <linux/static_call.h> > > #include <linux/amd-pstate.h> > > +#include <linux/topology.h> > > > > #include <acpi/processor.h> > > #include <acpi/cppc_acpi.h> > > @@ -49,6 +50,8 @@ > > > > #define AMD_PSTATE_TRANSITION_LATENCY 20000 > > #define AMD_PSTATE_TRANSITION_DELAY 1000 > > +#define AMD_PSTATE_PREFCORE_THRESHOLD 166 > > +#define AMD_PSTATE_MAX_CPPC_PERF 255 > > > > /* > > * TODO: We need more time to fine tune processors with shared memory > > solution @@ -65,6 +68,12 @@ static struct cpufreq_driver > > amd_pstate_epp_driver; static int cppc_state = > AMD_PSTATE_UNDEFINED; > > static bool cppc_enabled; > > > > +/*HW preferred Core featue is supported*/ static bool hw_prefcore = > > +true; > > + > > +/*Preferred Core featue is supported*/ static bool prefcore = true; > > + > > /* > > * AMD Energy Preference Performance (EPP) > > * The EPP is used in the CCLK DPM controller to drive @@ -290,23 > > +299,21 @@ static inline int amd_pstate_enable(bool enable) static > > int pstate_init_perf(struct amd_cpudata *cpudata) { > > u64 cap1; > > - u32 highest_perf; > > > > int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, > > &cap1); > > if (ret) > > return ret; > > > > - /* > > - * TODO: Introduce AMD specific power feature. > > - * > > - * CPPC entry doesn't indicate the highest performance in some > ASICs. > > + /* For platforms that do not support the preferred core feature, the > > + * highest_pef may be configured with 166 or 255, to avoid max > frequency > > + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) > value as > > + * the default max perf. > > */ > > - highest_perf = amd_get_highest_perf(); > > - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) > > - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); > > - > > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > > + if (prefcore) > > + WRITE_ONCE(cpudata->highest_perf, > AMD_PSTATE_PREFCORE_THRESHOLD); > > + else > > + WRITE_ONCE(cpudata->highest_perf, > AMD_CPPC_HIGHEST_PERF(cap1)); > > > > WRITE_ONCE(cpudata->nominal_perf, > AMD_CPPC_NOMINAL_PERF(cap1)); > > WRITE_ONCE(cpudata->lowest_nonlinear_perf, > > AMD_CPPC_LOWNONLIN_PERF(cap1)); @@ -318,17 +325,15 @@ static int > > pstate_init_perf(struct amd_cpudata *cpudata) static int > > cppc_init_perf(struct amd_cpudata *cpudata) { > > struct cppc_perf_caps cppc_perf; > > - u32 highest_perf; > > > > int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); > > if (ret) > > return ret; > > > > - highest_perf = amd_get_highest_perf(); > > - if (highest_perf > cppc_perf.highest_perf) > > - highest_perf = cppc_perf.highest_perf; > > - > > - WRITE_ONCE(cpudata->highest_perf, highest_perf); > > + if (prefcore) > > + WRITE_ONCE(cpudata->highest_perf, > AMD_PSTATE_PREFCORE_THRESHOLD); > > + else > > + WRITE_ONCE(cpudata->highest_perf, > cppc_perf.highest_perf); > > > > WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); > > WRITE_ONCE(cpudata->lowest_nonlinear_perf, > > @@ -676,6 +681,73 @@ static void amd_perf_ctl_reset(unsigned int cpu) > > wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); } > > > > +/* > > + * Set amd-pstate preferred core enable can't be done directly from > > +cpufreq callbacks > > + * due to locking, so queue the work for later. > > + */ > > +static void amd_pstste_sched_prefcore_workfn(struct work_struct > > +*work) { > > + sched_set_itmt_support(); > > +} > > +static DECLARE_WORK(sched_prefcore_work, > > +amd_pstste_sched_prefcore_workfn); > > + > > +/* > > + * Get the highest performance register value. > > + * @cpu: CPU from which to get highest performance. > > + * @highest_perf: Return address. > > + * > > + * Return: 0 for success, -EIO otherwise. > > + */ > > +static int amd_pstate_get_highest_perf(int cpu, u64 *highest_perf) { > > + int ret; > > + > > + if (boot_cpu_has(X86_FEATURE_CPPC)) { > > + u64 cap1; > > + > > + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, > &cap1); > > + if (ret) > > + return ret; > > + WRITE_ONCE(*highest_perf, > AMD_CPPC_HIGHEST_PERF(cap1)); > > + } else { > > + ret = cppc_get_highest_perf(cpu, highest_perf); > > + } > > + > > + return (ret); > > +} > > + > > +static void amd_pstate_init_prefcore(void) { > > + int cpu, ret; > > + u64 highest_perf; > > + > > + if (!prefcore) > > + return; > > + > > + for_each_online_cpu(cpu) { > > + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); > > + if (ret) > > + break; > > + > > + sched_set_itmt_core_prio(highest_perf, cpu); > > + > > + /* check if CPPC preferred core feature is enabled*/ > > + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { > > + hw_prefcore = false; > > + prefcore = false; > > I think you should use prefcore which embeds into cpudata structure instead > of global variable. Here, actually, you walked through all online cpus, the last > cpu's status will overwrite the previous one. > [Meng, Li (Jassmine)] The variable "prefcore" is an early kernel param. User can set it status to enabled or disabled. I think it cannot be embedded into "cpudata" structure. > > + return; > > + } > > + } > > + > > + /* > > + * This code can be run during CPU online under the > > + * CPU hotplug locks, so sched_set_amd_prefcore_support() > > + * cannot be called from here. Queue up a work item > > + * to invoke it. > > + */ > > + schedule_work(&sched_prefcore_work); > > +} > > + > > static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { > > int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; > @@ > > -1037,6 +1109,18 @@ static ssize_t status_store(struct device *a, struct > device_attribute *b, > > return ret < 0 ? ret : count; > > } > > > > +static ssize_t hw_prefcore_show(struct device *dev, > > + struct device_attribute *attr, char *buf) { > > + return sysfs_emit(buf, "%s\n", hw_prefcore ? "supported" : > > +"unsupported"); } > > Is there any requirement from user space (cpupower or other tool) to query > the capacity at runtime? In fact, we can simplify the codes that use a print in > the kernel to let user know whether current cpu supports prefcore in > hardware side. > > Thanks, > Ray [Meng, Li (Jassmine)] I will modify it to pr_debug() message. > > > + > > +static ssize_t prefcore_show(struct device *dev, > > + struct device_attribute *attr, char *buf) { > > + return sysfs_emit(buf, "%s\n", prefcore ? "enabled" : "disabled"); } > > + > > cpufreq_freq_attr_ro(amd_pstate_max_freq); > > cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); > > > > @@ -1044,6 +1128,8 @@ cpufreq_freq_attr_ro(amd_pstate_highest_perf); > > cpufreq_freq_attr_rw(energy_performance_preference); > > cpufreq_freq_attr_ro(energy_performance_available_preferences); > > static DEVICE_ATTR_RW(status); > > +static DEVICE_ATTR_RO(hw_prefcore); > > +static DEVICE_ATTR_RO(prefcore); > > > > static struct freq_attr *amd_pstate_attr[] = { > > &amd_pstate_max_freq, > > @@ -1063,6 +1149,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = > > { > > > > static struct attribute *pstate_global_attributes[] = { > > &dev_attr_status.attr, > > + &dev_attr_prefcore.attr, > > NULL > > }; > > > > @@ -1506,6 +1593,8 @@ static int __init amd_pstate_init(void) > > } > > } > > > > + amd_pstate_init_prefcore(); > > + > > return ret; > > > > global_attr_free: > > @@ -1527,7 +1616,17 @@ static int __init amd_pstate_param(char *str) > > > > return amd_pstate_set_driver(mode_idx); } > > + > > +static int __init amd_prefcore_param(char *str) { > > + if (!strcmp(str, "disable")) > > + prefcore = false; > > + > > + return 0; > > +} > > + > > early_param("amd_pstate", amd_pstate_param); > > +early_param("amd_prefcore", amd_prefcore_param); > > > > MODULE_AUTHOR("Huang Rui <ray.huang@amd.com>"); > > MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); > > -- > > 2.34.1 > >
On Tue, Sep 05, 2023 at 09:51:12AM +0800, Meng Li wrote: > + /* > + * This code can be run during CPU online under the > + * CPU hotplug locks, so sched_set_amd_prefcore_support() There is no such function... ? > + * cannot be called from here. Queue up a work item > + * to invoke it. > + */ > + schedule_work(&sched_prefcore_work);
On Tue, Sep 05, 2023 at 09:51:12AM +0800, Meng Li wrote: > +static void amd_pstate_init_prefcore(void) > +{ > + int cpu, ret; > + u64 highest_perf; > + > + if (!prefcore) > + return; > + > + for_each_online_cpu(cpu) { > + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); > + if (ret) > + break; > + > + sched_set_itmt_core_prio(highest_perf, cpu); > + > + /* check if CPPC preferred core feature is enabled*/ > + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { > + hw_prefcore = false; > + prefcore = false; > + return; > + } > + } > + > + /* > + * This code can be run during CPU online under the > + * CPU hotplug locks, so sched_set_amd_prefcore_support() > + * cannot be called from here. Queue up a work item > + * to invoke it. > + */ > + schedule_work(&sched_prefcore_work); > +} > @@ -1506,6 +1593,8 @@ static int __init amd_pstate_init(void) > } > } > > + amd_pstate_init_prefcore(); > + > return ret; > > global_attr_free: I'm confused,... you call amd_pstate_init_prefcore() at device_initcall(). Once per boot. Then it iterates all online CPUs.. But what if you boot with some CPUs offline and bring then online later?
Hi all: The core frequency is subjected to the process variation in semiconductors. Not all cores are able to reach the maximum frequency respecting the infrastructure limits. Consequently, AMD has redefined the concept of maximum frequency of a part. This means that a fraction of cores can reach maximum frequency. To find the best process scheduling policy for a given scenario, OS needs to know the core ordering informed by the platform through highest performance capability register of the CPPC interface. Earlier implementations of amd-pstate preferred core only support a static core ranking and targeted performance. Now it has the ability to dynamically change the preferred core based on the workload and platform conditions and accounting for thermals and aging. Amd-pstate driver utilizes the functions and data structures provided by the ITMT architecture to enable the scheduler to favor scheduling on cores which can be get a higher frequency with lower voltage. We call it amd-pstate preferred core. Here sched_set_itmt_core_prio() is called to set priorities and sched_set_itmt_support() is called to enable ITMT feature. Amd-pstate driver uses the highest performance value to indicate the priority of CPU. The higher value has a higher priority. Amd-pstate driver will provide an initial core ordering at boot time. It relies on the CPPC interface to communicate the core ranking to the operating system and scheduler to make sure that OS is choosing the cores with highest performance firstly for scheduling the process. When amd-pstate driver receives a message with the highest performance change, it will update the core ranking. Changes form V4->V5: - cpufreq: amd-pstate: - - modify sysfs attribute for CPPC highest perf. - - modify warning about comments - - rebase linux-next - cpufreq: - - Moidfy warning about function declarations. - Documentation: amd-pstate: - - align with ``amd-pstat`` Changes form V3->V4: - Documentation: amd-pstate: - - Modify inappropriate descriptions. Changes form V2->V3: - x86: - - Modify kconfig and description. - cpufreq: amd-pstate: - - Add Co-developed-by tag in commit message. - cpufreq: - - Modify commit message. - Documentation: amd-pstate: - - Modify inappropriate descriptions. Changes form V1->V2: - acpi: cppc: - - Add reference link. - cpufreq: - - Moidfy link error. - cpufreq: amd-pstate: - - Init the priorities of all online CPUs - - Use a single variable to represent the status of preferred core. - Documentation: - - Default enabled preferred core. - Documentation: amd-pstate: - - Modify inappropriate descriptions. - - Default enabled preferred core. - - Use a single variable to represent the status of preferred core. Meng Li (7): x86: Drop CPU_SUP_INTEL from SCHED_MC_PRIO for the expansion. acpi: cppc: Add get the highest performance cppc control cpufreq: amd-pstate: Enable amd-pstate preferred core supporting. cpufreq: Add a notification message that the highest perf has changed cpufreq: amd-pstate: Update amd-pstate preferred core ranking dynamically Documentation: amd-pstate: introduce amd-pstate preferred core Documentation: introduce amd-pstate preferrd core mode kernel command line options .../admin-guide/kernel-parameters.txt | 5 + Documentation/admin-guide/pm/amd-pstate.rst | 68 ++++++- arch/x86/Kconfig | 5 +- drivers/acpi/cppc_acpi.c | 13 ++ drivers/acpi/processor_driver.c | 6 + drivers/cpufreq/amd-pstate.c | 167 ++++++++++++++++-- drivers/cpufreq/cpufreq.c | 13 ++ include/acpi/cppc_acpi.h | 5 + include/linux/amd-pstate.h | 11 ++ include/linux/cpufreq.h | 5 + 10 files changed, 277 insertions(+), 21 deletions(-)