@@ -157,9 +157,6 @@ static int __init pcie_port_pm_setup(char *str)
}
__setup("pcie_port_pm=", pcie_port_pm_setup);
-/* Time to wait after a reset for device to become responsive */
-#define PCIE_RESET_READY_POLL_MS 60000
-
/**
* pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
* @bus: pointer to PCI bus structure to search
@@ -1033,7 +1030,7 @@ void pci_wakeup_bus(struct pci_bus *bus)
static int pci_dev_wait(struct pci_dev *dev, enum pci_init_event event)
{
const char *event_name = pci_init_event_name(event);
- int timeout = PCIE_RESET_READY_POLL_MS;
+ int timeout = dev->reset_ready_poll_ms;
int delay = 1;
u32 id;
@@ -113,6 +113,9 @@ int pci_bus_error_reset(struct pci_dev *dev);
/* D0/D1->D2 and D2->D0 delay */
#define PCI_PM_D2_DELAY 200
+/* Time to wait after a reset for device to become responsive */
+#define PCIE_RESET_READY_POLL_MS 60000
+
/**
* struct pci_platform_pm_ops - Firmware PM callbacks
*
@@ -2168,6 +2168,8 @@ struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
if (!dev)
return NULL;
+ dev->reset_ready_poll_ms = PCIE_RESET_READY_POLL_MS;
+
INIT_LIST_HEAD(&dev->bus_list);
dev->dev.type = &pci_dev_type;
dev->bus = pci_bus_get(bus);
@@ -392,6 +392,9 @@ struct pci_dev {
unsigned int delay[PCI_INIT_EVENT_COUNT]; /* minimum waiting time
after various events
in ms */
+ unsigned int reset_ready_poll_ms; /* Timeout for polling after
+ reset before the device is
+ deemed broken. */
#ifdef CONFIG_PCIEASPM
struct pcie_link_state *link_state; /* ASPM link state */