From patchwork Thu Sep 22 10:14:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 4246 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E87D223EF6 for ; Thu, 22 Sep 2011 10:15:13 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id D78D9A1863E for ; Thu, 22 Sep 2011 10:15:13 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id 23so3623202fxe.11 for ; Thu, 22 Sep 2011 03:15:13 -0700 (PDT) Received: by 10.223.5.76 with SMTP id 12mr2764172fau.103.1316686513767; Thu, 22 Sep 2011 03:15:13 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.18.198 with SMTP id y6cs162908lad; Thu, 22 Sep 2011 03:15:13 -0700 (PDT) Received: by 10.229.101.168 with SMTP id c40mr1494776qco.156.1316686512144; Thu, 22 Sep 2011 03:15:12 -0700 (PDT) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe005.messaging.microsoft.com. [216.32.181.185]) by mx.google.com with ESMTPS id x4si1899160qct.145.2011.09.22.03.15.11 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 22 Sep 2011 03:15:12 -0700 (PDT) Received-SPF: neutral (google.com: 216.32.181.185 is neither permitted nor denied by best guess record for domain of richard.zhu@linaro.org) client-ip=216.32.181.185; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.185 is neither permitted nor denied by best guess record for domain of richard.zhu@linaro.org) smtp.mail=richard.zhu@linaro.org Received: from mail182-ch1-R.bigfish.com (216.32.181.173) by CH1EHSOBE002.bigfish.com (10.43.70.52) with Microsoft SMTP Server id 14.1.225.22; Thu, 22 Sep 2011 10:15:11 +0000 Received: from mail182-ch1 (localhost.localdomain [127.0.0.1]) by mail182-ch1-R.bigfish.com (Postfix) with ESMTP id 3239417103C1; Thu, 22 Sep 2011 10:15:11 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail182-ch1 (localhost.localdomain [127.0.0.1]) by mail182-ch1 (MessageSwitch) id 1316686510879061_3233; Thu, 22 Sep 2011 10:15:10 +0000 (UTC) Received: from CH1EHSMHS030.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.245]) by mail182-ch1.bigfish.com (Postfix) with ESMTP id D0D951A18050; Thu, 22 Sep 2011 10:15:10 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS030.bigfish.com (10.43.70.30) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 22 Sep 2011 10:15:10 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.323.7; Thu, 22 Sep 2011 05:15:09 -0500 Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.136]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p8MAEoeJ018318; Thu, 22 Sep 2011 05:15:06 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , Richard Zhu Subject: [V8 PATCH 5/5] MX53 Enable the AHCI SATA on MX53 SMD board Date: Thu, 22 Sep 2011 18:14:48 +0800 Message-ID: <1316686488-4684-6-git-send-email-richard.zhu@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1316686488-4684-1-git-send-email-richard.zhu@linaro.org> References: <1316686488-4684-1-git-send-email-richard.zhu@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Signed-off-by: Richard Zhu --- arch/arm/mach-mx5/board-mx53_smd.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index bc02894..9d06fbe 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c @@ -35,6 +35,7 @@ #include "devices-imx53.h" #define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) +#define MX53_SMD_SATA_PWR_EN IMX_GPIO_NR(3, 3) static iomux_v3_cfg_t mx53_smd_pads[] = { MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, @@ -111,6 +112,19 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = { .bitrate = 100000, }; +static inline void mx53_smd_ahci_pwr_on(void) +{ + int ret; + + /* Enable SATA PWR */ + ret = gpio_request(MX53_SMD_SATA_PWR_EN, "ahci-sata-pwr"); + if (ret) { + printk(KERN_ERR "failed to get SATA_PWR_EN: %d\n", ret); + return; + } + gpio_direction_output(MX53_SMD_SATA_PWR_EN, 1); +} + static void __init mx53_smd_board_init(void) { imx53_soc_init(); @@ -125,6 +139,8 @@ static void __init mx53_smd_board_init(void) imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(1, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); + mx53_smd_ahci_pwr_on(); + imx53_add_ahci_imx(); } static void __init mx53_smd_timer_init(void)