From patchwork Wed Nov 23 11:12:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhao X-Patchwork-Id: 5292 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A2B0123E07 for ; Wed, 23 Nov 2011 11:13:35 +0000 (UTC) Received: from mail-lpp01m010-f52.google.com (mail-lpp01m010-f52.google.com [209.85.215.52]) by fiordland.canonical.com (Postfix) with ESMTP id 7D8B5A1866C for ; Wed, 23 Nov 2011 11:13:35 +0000 (UTC) Received: by laah2 with SMTP id h2so19375laa.11 for ; Wed, 23 Nov 2011 03:13:35 -0800 (PST) Received: by 10.152.135.166 with SMTP id pt6mr14390985lab.26.1322046815016; Wed, 23 Nov 2011 03:13:35 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs225902lal; Wed, 23 Nov 2011 03:13:34 -0800 (PST) Received: by 10.68.37.2 with SMTP id u2mr7227577pbj.56.1322046812376; Wed, 23 Nov 2011 03:13:32 -0800 (PST) Received: from VA3EHSOBE004.bigfish.com (va3ehsobe004.messaging.microsoft.com. [216.32.180.14]) by mx.google.com with ESMTPS id g10si3073064pbv.85.2011.11.23.03.13.31 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 23 Nov 2011 03:13:32 -0800 (PST) Received-SPF: neutral (google.com: 216.32.180.14 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) client-ip=216.32.180.14; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.180.14 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) smtp.mail=richard.zhao@linaro.org Received: from mail79-va3-R.bigfish.com (10.7.14.250) by VA3EHSOBE004.bigfish.com (10.7.40.24) with Microsoft SMTP Server id 14.1.225.22; Wed, 23 Nov 2011 11:12:50 +0000 Received: from mail79-va3 (localhost [127.0.0.1]) by mail79-va3-R.bigfish.com (Postfix) with ESMTP id A4FE54C0515; Wed, 23 Nov 2011 11:09:57 +0000 (UTC) X-SpamScore: 10 X-BigFish: VS10(z1039ozc8kzz1202hzz8275dhz2dh87h2a8h668h839h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail79-va3 (localhost.localdomain [127.0.0.1]) by mail79-va3 (MessageSwitch) id 1322046596968890_27212; Wed, 23 Nov 2011 11:09:56 +0000 (UTC) Received: from VA3EHSMHS015.bigfish.com (unknown [10.7.14.239]) by mail79-va3.bigfish.com (Postfix) with ESMTP id DDDDD64004A; Wed, 23 Nov 2011 11:09:56 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS015.bigfish.com (10.7.99.25) with Microsoft SMTP Server (TLS) id 14.1.225.22; Wed, 23 Nov 2011 11:12:46 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.339.2; Wed, 23 Nov 2011 05:13:26 -0600 Received: from b20223-02.ap.freescale.net (b20223-02.ap.freescale.net [10.192.242.124]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id pANBDAMj008802; Wed, 23 Nov 2011 05:13:23 -0600 (CST) From: Richard Zhao To: CC: , , , , , , , Sascha Hauer Subject: [RFC V1 4/8] clk: Add support for a generic clock multiplexer Date: Wed, 23 Nov 2011 19:12:31 +0800 Message-ID: <1322046755-13511-5-git-send-email-richard.zhao@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1322046755-13511-1-git-send-email-richard.zhao@linaro.org> References: <1322046755-13511-1-git-send-email-richard.zhao@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com This patch adds support for a common type of clock multiplexer. The multiplexer is described with register, shift and width and an array of clocks which correspond to the bit value. Signed-off-by: Sascha Hauer Signed-off-by: Richard Zhao --- drivers/clk/Kconfig | 4 +++ drivers/clk/Makefile | 1 + drivers/clk/clk-mux.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/clk.h | 33 +++++++++++++++++++++++++ 4 files changed, 102 insertions(+), 0 deletions(-) create mode 100644 drivers/clk/clk-mux.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 979d4df..fadbcdd 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -24,6 +24,10 @@ config GENERIC_CLK_DIVIDER bool depends on GENERIC_CLK +config GENERIC_CLK_MUX + bool + depends on GENERIC_CLK + config GENERIC_CLK_SYSFS bool "Clock tree topology and debug info" depends on EXPERIMENTAL && GENERIC_CLK diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 894ff3f..4327715 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -3,4 +3,5 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_GENERIC_CLK) += clk.o obj-$(CONFIG_GENERIC_CLK_BASIC) += clk-basic.o obj-$(CONFIG_GENERIC_CLK_DIVIDER) += clk-divider.o +obj-$(CONFIG_GENERIC_CLK_MUX) += clk-mux.o obj-$(CONFIG_GENERIC_CLK_SYSFS) += clk-sysfs.o diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c new file mode 100644 index 0000000..05e813e --- /dev/null +++ b/drivers/clk/clk-mux.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2011 Sascha Hauer, Pengutronix + * Copyright (C) 2011 Richard Zhao, Linaro + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Standard functionality for the common clock API. + */ +#include +#include +#include +#include + +#define to_clk_mux(ck) container_of(ck, struct clk_mux, clk) + +static struct clk *clk_mux_get_parent(struct clk *clk) +{ + struct clk_mux *mux = to_clk_mux(clk); + u32 val; + + val = readl(mux->reg) >> mux->shift; + val &= (1 << mux->width) - 1; + + if (val >= mux->num_clks) + return ERR_PTR(-EINVAL); + + return mux->clks[val]; +} + +static int clk_mux_set_parent(struct clk *clk, struct clk *parent) +{ + struct clk_mux *mux = to_clk_mux(clk); + u32 val; + int i; + unsigned long flags = 0; + + for (i = 0; i < mux->num_clks; i++) + if (mux->clks[i] == parent) + break; + + if (i == mux->num_clks) + return -EINVAL; + + if (mux->lock) + spin_lock_irqsave(mux->lock, flags); + + val = readl(mux->reg); + val &= ~(((1 << mux->width) - 1) << mux->shift); + val |= i << mux->shift; + writel(val, mux->reg); + + if (mux->lock) + spin_unlock_irqrestore(mux->lock, flags); + + return 0; +} + +struct clk_hw_ops clk_mux_ops = { + .get_parent = clk_mux_get_parent, + .set_parent = clk_mux_set_parent, +}; +EXPORT_SYMBOL_GPL(clk_mux_ops); diff --git a/include/linux/clk.h b/include/linux/clk.h index 1a6c81c..2b65a69 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -202,6 +202,39 @@ extern struct clk_hw_ops clk_divider_ops; #endif /* CONFIG_GENERIC_CLK_DIVIDER */ +#ifdef CONFIG_GENERIC_CLK_MUX + +#include + +/** + * clock multiplexer + * + * @reg the register this multiplexer can be configured with + * @shift the shift to the start bit of this multiplexer + * @width the width in bits of this multiplexer + * @num_clks number of parent clocks + * @lock register lock + * @clks array of possible parents for this multiplexer. Can contain + * holes with NULL in it for invalid register settings + * + * This clock implements get_parent/set_parent. prepare/unprepare, + * enable/disable and get_rate operations are passed through to the parent, + * the rate is not adjustable. + */ +struct clk_mux { + struct clk clk; + void __iomem *reg; + unsigned char shift; + unsigned char width; + unsigned char num_clks; + spinlock_t *lock; + struct clk **clks; +}; + +extern struct clk_hw_ops clk_mux_ops; + +#endif /* CONFIG_GENERIC_CLK_MUX */ + /** * clk_init - initialize the data structures in a struct clk * @dev: device initializing this clk, placeholder for now