From patchwork Mon Jan 2 13:23:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 6026 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 16FAE23E14 for ; Mon, 2 Jan 2012 13:23:22 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id 07632A18535 for ; Mon, 2 Jan 2012 13:23:22 +0000 (UTC) Received: by eaac11 with SMTP id c11so14647144eaa.11 for ; Mon, 02 Jan 2012 05:23:21 -0800 (PST) Received: by 10.205.120.14 with SMTP id fw14mr10796055bkc.53.1325510601737; Mon, 02 Jan 2012 05:23:21 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs313370bkc; Mon, 2 Jan 2012 05:23:21 -0800 (PST) Received: by 10.213.13.137 with SMTP id c9mr3886080eba.121.1325510600371; Mon, 02 Jan 2012 05:23:20 -0800 (PST) Received: from eu1sys200aog108.obsmtp.com (eu1sys200aog108.obsmtp.com. [207.126.144.125]) by mx.google.com with SMTP id b1si26111510eeg.106.2012.01.02.05.23.17 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 02 Jan 2012 05:23:20 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.125 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.125; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.125 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob108.postini.com ([207.126.147.11]) with SMTP ID DSNKTwGvwU0mKf9hLrUZMNg/uUMfUGet3lGh@postini.com; Mon, 02 Jan 2012 13:23:20 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D4FEFC2; Mon, 2 Jan 2012 13:14:45 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 4574F1565; Mon, 2 Jan 2012 13:23:10 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 9CC4324C075; Mon, 2 Jan 2012 14:23:02 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 2 Jan 2012 14:23:09 +0100 From: Linus Walleij To: Cc: Daniel Lezcano , Linus Walleij , Marc Zyngier Subject: [PATCH] clocksource/ux500-prcmu: fix sched_clock breakage Date: Mon, 2 Jan 2012 14:23:03 +0100 Message-ID: <1325510583-4487-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.8 MIME-Version: 1.0 commit 2f0778afac79bd8d226225556858a636931eeabc adding runtime-selectable sched_clock() forgot to patch this driver down in drivers/clocksource, this patch fixes the problem. Reported-by: Daniel Lezcano Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/clocksource/clksrc-dbx500-prcmu.c | 16 +++------------- 1 files changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 59feefe..fb6b6d2 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = { }; #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace dbx500_prcmu_sched_clock_read(void) { - u32 cyc; - if (unlikely(!clksrc_dbx500_timer_base)) return 0; - cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); - - return cyc_to_sched_clock(&cd, cyc, (u32)~0); + return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); } -static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) -{ - u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); - update_sched_clock(&cd, cyc, (u32)~0); -} #endif void __init clksrc_dbx500_prcmu_init(void __iomem *base) @@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) clksrc_dbx500_timer_base + PRCMU_TIMER_REF); } #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK - init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, + setup_sched_clock(dbx500_prcmu_sched_clock_read, 32, RATE_32K); #endif clocksource_calc_mult_shift(&clocksource_dbx500_prcmu,